A MIS capacitor and a method of making the same. The capacitor includes a semiconductor substrate having a first part having a first conductivity type and contact regions for coupling the first part to an output node. The substrate has dielectric on a surface of the first part and electrodes on the dielectric. The substrate has a second part having a second conductivity type and a third part having the first conductivity type. The third part is coupleable to a supply voltage. The second part is located between the first part and the third part. The first part and the second part form a first p-n junction and the second part and the third part form a second p-n junction. A reference contact is provided for coupling the second part to a reference voltage. A further contact region is provided for coupling the second part to the output node.

An ultrasound circuit comprising a trans-impedance amplifier (TIA) with built-in time gain compensation functionality is described. The TIA is coupled to an ultrasonic transducer to amplify an electrical signal generated by the ultrasonic transducer in response to receiving an ultrasound signal. The TIA is, in some cases, followed by further analog and digital processing circuitry.

Systems, devices, and methods related to low-noise, high-accuracy single-ended continuous-time sigma-delta (CTSD) analog-to-digital converter (ADC) are provided. An example single-ended CTSD ADC includes a pair of input nodes to receive a single-ended input signal and input circuitry. The input circuitry includes a pair of switches, each coupled to one of the pair of input nodes; and an amplifier to provide a common mode signal at a pair of first nodes, each before one of the pair of switches. The single-ended CTSD ADC further includes digital-to-analog converter (DAC) circuitry; and integrator circuitry coupled to the input circuitry and the DAC circuitry via a pair of second nodes.

Various embodiments provide for active suppression circuitry. The active suppression circuitry can be used with a circuit for a memory system, such as a dual data rate (DDR) memory system. For example, some embodiments provide an active suppression integrated circuit. The active suppression integrated circuit can be used by a memory system to efficiently suppress power supply noise caused by resonance of a power delivery network (PDN) of the memory system, thereby improving power integrity of the memory system input/output.

A differential MEMS-readout circuit comprises a first input bonding pad, including a first contact pin and a second contact pin. The differential MEMS-readout circuit comprises a second input bonding pad, including a first contact pin and a second contact pin; and a differential-readout amplifier section comprising a first input connected to the first contact pin of the first input bonding pad and a second input connected to the first contact pin of the second bonding pad, wherein the differential-readout amplifier section comprises a first and a second transistor circuit and each of the second contact pins of the first and second input bonding pads is coupled to one of the first and the second transistor circuits or is coupled to one of the first and the second transistor circuits and/or to ground.

A circuit may include or may be coupled to a precharge structure to reduce or minimize a net perturbation, caused by switching, in the input source. Apparatus and techniques shown herein may enable low input current operation in a signal chain of an analog circuit by such reduction or minimization of such perturbation.

A current sensor architecture is implemented using a trans-resistance amplifier circuit having a low pass filter characteristic. The current sensing resistor and the input resistors for the amplifier circuit are matched thermally so that they have substantially identical temperature coefficients. The feedback resistors, which are coupled in parallel with corresponding capacitors, are implemented using switched capacitor circuits that emulate resistors. With this configuration, the current sensor is temperature insensitive.

An ECG signal acquisition system includes a first amplifier which has a non-inverting input adapted to be coupled to a first differential input, an inverting input adapted to be coupled to a second differential input, and an output. The system includes first and second biasing resistors coupled between the non-inverting and inverting inputs of the first amplifier. The system includes an average estimation circuit which has a first input coupled to the non-inverting input of the first amplifier and a second input coupled to the inverting input of the first amplifier. The system includes a driver amplifier which has an inverting input coupled to the output of the average estimation circuit, a non-inverting input coupled to receive a reference common-mode voltage, and an output. The system includes a low-pass filter coupled between the output of the driver amplifier and the biasing resistors.

This application relates to method and apparatus for driving acoustic transducers, such as speakers or haptic transducers. A transducer driver circuit (200) has a hysteretic comparator (201) configured to compare, with hysteresis, an input signal (S.sub.IN) received at a first comparator input to a feedback signal (S.sub.FB) received at a second comparator input. Based on the comparison the hysteretic comparator (201) generates a pulse-width modulation (PWM) signal (S.sub.PWM) at a comparator output (206). An inductor (203) is coupled between the comparator output and an output node (204). In use a resistive component (208), which may comprise the transducer (301) is coupled to output node (204). The inductor (203) and resistive component (208) provide filtering to the PWM signal (S.sub.PWM). A feedback path extends between the output node (204) and the second comparator input to provide the feedback signal (S.sub.FB).

An amplifier includes a first input transistor, a second input transistor, a first cascode transistor, a second cascode transistor, a first current mirror circuit, and a second current mirror circuit. The first input transistor is coupled to a first input terminal. The second input transistor is coupled to a second input terminal and the first input transistor. The first cascode transistor is coupled to the first input transistor. The second cascode transistor is coupled to the second input transistor and the first cascode transistor. The first current mirror circuit is coupled to the first cascode transistor, the second cascode transistor, and the first input terminal. The second current mirror circuit is coupled to the first cascode transistor, the second cascode transistor, and the second input terminal.