Patent classifications
H03F3/45
Multi-channel common-mode coupled AC gain amplifier
Devices, systems, and methods for multi-channel common-mode coupled alternating current (AC) gain amplifiers (MC-CM-AC Amp) are disclosed. The MC-CM-AC Amp can comprise a first operational amplifier including: a first non-inverting input port configured to be coupled to a first input signal, and a first inverting input port configured to be coupled to a first capacitor. The MC-CM-AC Amp can comprise a second operational amplifier including a second non-inverting input port configured to be coupled to a second input signal, and a second inverting input port configured to be coupled to a second capacitor. The MC-CM-AC Amp can comprise one or more gain-setting resistors configured to be coupled between the first capacitor and the second capacitor.
Output common-mode control for dynamic amplifiers
Techniques and apparatus for output common-mode control of dynamic amplifiers, as well as analog-to-digital converters (ADCs) and other circuits implemented with such dynamic amplifiers. One example amplifier circuit includes a dynamic amplifier and a current source. The dynamic amplifier generally includes differential inputs, differential outputs, transconductance elements coupled to the differential inputs, a first set of capacitive elements coupled to the differential outputs, and a control input for controlling a time length of amplification for the dynamic amplifier. The current source is configured to generate an output current such that portions of the output current are selectively applied to the differential outputs of the dynamic amplifier during at least a portion of the time length of amplification.
CMOS active inductor circuit for amplifier
A device, a memory interface device, and a method of implementing an active inductor circuit are disclosed. In one aspect, the device includes one or more active inductor circuits, each including a first metal-oxide-semiconductor (MOS) transistor and a second MOS transistor. The first MOS transistor has a first terminal connected to a first voltage level, a second terminal connected to a resistor, and a gate terminal. The second MOS transistor has a first terminal connected to the first voltage level, a second terminal connected to a first current source and the gate terminal of the first MOS transistor, and a gate terminal connected to the resistor and to a capacitor connected to a second voltage level. One of the first MOS transistor and the second MOS transistor is a p-channel MOS (PMOS) transistor, and another of the first MOS transistor and the second MOS transistor is an n-channel MOS (NMOS) transistor.
LOW-HEADROOM DYNAMIC BASE CURRENT CANCELLATION TECHNIQUES
Circuit techniques for providing base-current cancellation of a bipolar junction transistor (BJT) differential pair that compensate for tail current noise and differential voltage transients without penalizing supply headroom.
ANALOG IMPLEMENTATION OF VARIABLE-GAIN DIFFERENTIATORS BASED ON VOLTAGE-CONTROLLED AMPLIFIERS
Disclosed are systems and methods for a variable-gain differentiator in series with at least two non-inverting amplifiers. The variable-gain differentiator is connected to a voltage-controlled source at its non-inverting input and to its output at its inverting input. The output is connected to the non-inverting input of the first non-inverting amplifier. The output of the first non-inverting amplifier is connected to the input of the second non-inverting amplifier. The output of the second non-inverting amplifier is connected to a series of three integrators. Each integrator is connected to its output by a feedback path. Varying the gain of the voltage-controlled amplifier varies the gain of the differentiator at the output of the third integrator, thereby varying the output of the system.
DYNAMIC CURRENT LIMIT FOR OPERATIONAL AMPLIFIER
An output stage of an operational amplifier includes a low voltage (LV) metal oxide semiconductor (MOS) device and a dynamic current limit circuit. An output current of the operational amplifier flows through the LV MOS device. The dynamic current limit circuit is configured to sense a drain voltage of the LV MOS device and increase a clamping voltage for the LV MOS device when the drain voltage of the LV MOS device is less than a threshold voltage.
TRANSFORMER-BASED MARCHAND BALUN AMPLIFIER FOR WIRELESS COMMUNICATION
An amplifier includes a first and a second differential input ports, and a single-ended output port. The amplifier includes a first and a second transistors, each having a gate, source, and drain terminals. The source terminals are coupled to a reference plane and the gate terminals are coupled to the respective first and second differential input ports. The amplifier includes a Balun having a primary and a secondary transformer winding, the primary transformer winding having one end coupled to the drain terminal of the first transistor, an opposite end coupled to the drain terminal of the second transistor, and a center tap coupled to a bias voltage, and the secondary transformer winding is adjacent to the primary transformer winding and having one end coupled to the single-ended output port and an opposite end open circuited. An electromagnetic field generated at the primary induces a signal at the secondary transformer winding.
DIFFERENTIAL DRIVER
In an embodiment, an electronic circuit includes: an input differential pair including first and second transistors; a first pair of transistors in emitter-follower configuration including third and fourth transistors, and an output differential pair including fifth and sixth transistors. The third transistor has a control terminal coupled to the first transistor, and a current path coupled to a first output terminal. The fourth transistor has a control terminal coupled to the second transistor, and a current path coupled to a second output terminal. The fifth transistor has a control terminal coupled to the first transistor, and a first current path terminal coupled to the first output terminal. The sixth transistor has a control terminal coupled to the second transistor, and a first current path terminal coupled to the second output terminal. First and second termination resistors are coupled between the first pair of transistors and the output differential pair.
DIFFERENTIAL AMPLIFIER CIRCUIT FOR USE IN ERROR AMPLIFIER OR COMPARATOR BEING COMPONENT OF DC TO DC CONVERTER (as amended)
A differential amplifier circuit of the present invention includes a differential input circuit including first and second transistors, and amplifies a difference voltage between a first input voltage applied to a control terminal of the first transistor and a second input voltage applied to a control terminal of the second transistor. The differential input circuit a P-channel depletion type transistor having a gate connected to the control terminal of the first transistor and a source connected to the control terminal of the second transistor, and the P-channel depletion type transistor operates as a bias current source of the differential amplifier circuit.
Variable gain power amplifiers
An integrated circuit includes an oscillator and a power amplifier. The oscillator includes a first node, a second node, and a network of one or more reactive components coupled between the first node and the second node. The power amplifier includes a first input coupled to the first output of the oscillator, a second input coupled to the second output of the oscillator, and an output. The power amplifier includes a coarse gain control circuit, a first amplifier stage, and a second amplifier stage.