A buffer stage includes a control circuit. The control circuit includes a voltage generator, a voltage-to-current converter, and a current-to-voltage converter. The voltage generator is configured to generate a compensation voltage. The voltage-to-current converter is configured to convert the compensation voltage into a compensation current. The current-to-voltage converter is configured to convert the compensation current into a recovery compensation voltage. The recovery compensation voltage is arranged for modifying an output voltage of the buffer stage.

Systems and devices are provided for generating a process, voltage, temperature (PVT)-independent reference current for a relatively low voltage domain. An apparatus may include a bandgap circuit that outputs a bandgap voltage and a first proportion-to-absolute temperature (PTAT) current. The apparatus may also include trimming circuitry that outputs a reference a voltage based at least in part on the bandgap voltage. Further, the apparatus may include reference current generation circuitry. In particular, the reference current generation circuitry may include a complementary-to-absolute-temperature (CTAT) current generation portion that generates a CTAT current based on the reference voltage as well as a PTAT current tuning portion that tunes a received first PTAT current to generate a second PTAT current. In addition, the CTAT current generation portion may include a variation-independent reference current generation portion that generates a reference current based on the CTAT current and the second PTAT current.

Systems and devices are provided for generating a process, voltage, temperature (PVT)-independent reference current for a relatively low voltage domain. An apparatus may include a bandgap circuit that outputs a bandgap voltage and a first proportion-to-absolute temperature (PTAT) current. The apparatus may also include trimming circuitry that outputs a reference a voltage based at least in part on the bandgap voltage. Further, the apparatus may include reference current generation circuitry. In particular, the reference current generation circuitry may include a complementary-to-absolute-temperature (CTAT) current generation portion that generates a CTAT current based on the reference voltage as well as a PTAT current tuning portion that tunes a received first PTAT current to generate a second PTAT current. In addition, the CTAT current generation portion may include a variation-independent reference current generation portion that generates a reference current based on the CTAT current and the second PTAT current.

A voltage follower circuit according to an embodiment includes first and second paths, the first path includes a first nMOS transistor and a first pMOS transistor, the second path includes a second nMOS transistor and a second pMOS transistor, an input voltage is supplied to the gate of the first nMOS transistor, an output voltage is supplied to the gate of the second nMOS transistor, a voltage lower than the output voltage is supplied to the gate of the first pMOS transistor, and a voltage lower than the input voltage is supplied to the gate of the second pMOS transistor.

A signal transmission circuit includes an impedance conversion circuit and a current-voltage conversion circuit. A first current is input to the impedance conversion circuit. The impedance conversion circuit outputs a second current according to the first current. The current-voltage conversion circuit converts the second current output from the impedance conversion circuit into a voltage. The impedance conversion circuit includes a first current source and a current output circuit. The first current source generates a reference current. The current output circuit outputs the second current according to the difference between the first current and the reference current or the sum of the first current and the reference current.

In an example apparatus, a first transistor has a base terminal, a first current terminal and a second current terminal. The base terminal is coupled to an input voltage node. A second transistor has a control terminal, a third current terminal and a fourth current terminal. The third current terminal is coupled to the second current terminal. The fourth current terminal is coupled to a first resistor. A second resistor is coupled to the control terminal. An inductor is coupled between the first resistor and a ground terminal.

A buffer amplifier comprises a source follower and a feedback amplifier. The feedback amplifier may be configured to control a drain current of the source follower to remain substantially constant independent of a load.

A (pre) driver circuit includes first and second output terminals configured to be coupled to a power transistor. A differential stage has non-inverting and inverting inputs for receiving an input voltage. The input voltage is replicated as an output voltage across the first and second output terminals as a drive signal for the power transistor. The differential stage includes a differential transconductance amplifier in a voltage follower arrangement configured to provide continuous regulation of a voltage at the first output terminal with respect to the second output terminal.

An exemplary embodiment of the present invention relates to an electrical amplifier comprising a differential preamplifier having a first output port and a second output port; a first output unit connected to the first output port of the differential preamplifier and a second output unit connected to the second output port of the differential preamplifier, the first and second output units being electrically arranged in parallel relative to each other; and a positive feedback loop that couples the first and second output units and comprises a first capacitor and a second capacitor; wherein each of the first and second output units comprises an emitter-follower unit and a bias transistor that is connected in series with the emitter-follower unit of its output unit; wherein an emitter of the emitter-follower unit of the first output unit is connected to a base of the bias transistor of the second output unit through the first capacitor of the positive feedback loop; and wherein an emitter of the emitter-follower unit of the second output unit is connected to a base of the bias transistor of the first output unit through the second capacitor of the positive feedback loop.

The disclosed technology relates to a method for improving performance of a feedback circuit comprising an amplifier and a feedback network, wherein the feedback circuit has at least one tunable component. In one aspect, the method comprises measuring first amplitude values at an input of the amplifier and second amplitude values at an output of the amplifier, estimating a linear open-loop gain of the amplifier based on both the amplitude values, estimating a linear finite gain error based on the estimated gain and the second amplitude values, subtracting the linear finite gain error from the first amplitude values to derive a set of samples containing second error information, deriving an signal-to-noise-plus-distortion ratio estimate based on the variance of the set of samples and a variance of the second amplitude values, and adjusting the feedback circuit in accordance with the signal-to-noise-plus-distortion ratio estimate.