In one embodiment, a dual-mode power amplifier that can operate in different modes includes: a first pair of metal oxide semiconductor field effect transistors (MOSFETs) to receive and pass a constant envelope signal; a second pair of MOSFETs to receive and pass a variable envelope signal, where first terminals of the first pair of MOSFETs are coupled to first terminals of the second pair of MOSFETs, and second terminals of the first pair of MOSFETs are coupled to. second terminals of the second pair of MOSFETs; and a shared MOSFET stack coupled to the first pair of MOSFETs and the second pair of MOSFETs.

A receiver circuit is disclosed. The receiver circuit includes an amplifier configured to generate an RF signal based on a received signal, where the RF signal includes an information signal and a blocker signal modulating an RF carrier frequency. The receiver circuit also includes an RF filter connected to the amplifier, where the RF filter is configured to selectively attenuate the blocker signal.

A power amplifier circuit including a plurality of analog power amplifiers configured to generate a output power for an output signal; at least one processor configured to: select a highest output power signal; determine an input signal power of a modulated signal; determine an output signal power based on the input signal power; compare the output signal power and the highest output power; and disable a subset of the plurality of analog power amplifiers based on the comparison, wherein a remainder of the plurality of analog power amplifiers are configured to generate the output signal power.

Devices and methods for operating a charge pump. In some implementations, a charge pump module includes a clock circuit configured generate to a first clock signal and a second clock signal, the first clock signal having a lower frequency than the second clock signal. The charge pump module also includes a driving circuit configured to generate a first set of clock signals based on the first clock signal and a second set of clock signals based on the second clock signal, the driving circuit coupled to the clock circuit. The charge pump module further includes a charge pump core including a set of capacitances, the charge pump core configured to charge the set of capacitances based the first set of clock signals and the second set of clock signals.

Devices and methods for operating a charge pump. In some implementations, a charge pump module includes a clock circuit configured generate to a first clock signal and a second clock signal, the first clock signal having a lower frequency than the second clock signal. The charge pump module also includes a driving circuit configured to generate a first set of clock signals based on the first clock signal and a second set of clock signals based on the second clock signal, the driving circuit coupled to the clock circuit. The charge pump module further includes a charge pump core including a set of capacitances, the charge pump core configured to charge the set of capacitances based the first set of clock signals and the second set of clock signals.

An acoustic wave device includes a silicon support substrate that includes first and second main surfaces opposing each other, a piezoelectric structure provided on the first main surface and including the piezoelectric layer, an IDT electrode provided on the piezoelectric layer, a support layer provided on the first main surface of the silicon support substrate and surrounding the piezoelectric layer, a cover layer provided on the support layer, a through-via electrode that extending through the silicon support substrate and the piezoelectric structure, and a first wiring electrode connected to the through-via electrode and electrically connected to the IDT electrode. The piezoelectric structure includes at least one layer having an insulating property, the at least one layer including the piezoelectric layer. The first wiring electrode is provided on the layer having an insulating property in the piezoelectric structure.

Methods and devices for reducing DC current consumption of a multi-stage LNA amplifier. According to one aspect, first and second amplification stages are stacked to provide a common conduction path of a DC current. The first stage includes a common-source amplifier, the second stage includes a common-drain amplifier. Coupling between the two stages is provided by series connection of load inductors of the respective stages and a capacitor coupled at a common node between the inductors. According to another aspect, a current splitter circuit is used to split a current to the first stage according to two separate conduction paths, one common path to the two stages, and another separate from the second stage. According to yet another aspect, the current splitter circuit includes a feedback loop that controls the splitting of the current so to maintain a constant current through the common path.

Implementations disclosed describe a programmable analog subsystem (PASS) having a plurality of reconfigurable analog circuits. The PASS may be coupled to an input/output device to receive an input signal and to an interface to communicate data with a central processing unit. In a first PASS configuration, with the plurality of reconfigurable analog circuits having a first configuration setting, the PASS may process the input signal through the plurality of reconfigurable analog circuits to generate a first output value based on the input signal. Responsive to the first output value, the PASS may reconfigure the plurality of reconfigurable analog circuits into a second PASS configuration having a second configuration setting, such that the second configuration setting is different than the first configuration setting.

Implementations disclosed describe a programmable analog subsystem (PASS) having a plurality of reconfigurable analog circuits. The PASS may be coupled to an input/output device to receive an input signal and to an interface to communicate data with a central processing unit. In a first PASS configuration, with the plurality of reconfigurable analog circuits having a first configuration setting, the PASS may process the input signal through the plurality of reconfigurable analog circuits to generate a first output value based on the input signal. Responsive to the first output value, the PASS may reconfigure the plurality of reconfigurable analog circuits into a second PASS configuration having a second configuration setting, such that the second configuration setting is different than the first configuration setting.

In accordance with an aspect of the present disclosure, there is provided a power amplification apparatus, the apparatus comprising: an input part; a first-1 transformer and a first-2 transformer connected to the input part in parallel; a first amplifier and a second amplifier connected to the first-1 transformer and the first-2 transformer, respectively; a first switch connected to one side of the first-2 transformer; a second-1 transformer and a second-2 transformer connected to the first amplifier and the second amplifier, respectively, and connected to an output part in parallel; and a second switch connected to one side of the second-2 transformer.