An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor.

An envelope tracking power management circuit is disclosed. An envelope tracking power management circuit includes a first envelope tracking amplifier(s) and a second envelope tracking amplifier(s), each configured to amplify a respective radio frequency (RF) signal(s) based on a respective supply voltage. A power management circuit can determine that a selected envelope tracking amplifier, which can be either the first envelope tracking amplifier(s) or the second envelope tracking amplifier(s), receives the respective supply voltage lower than a voltage required to amplify the respective RF signal(s) to a predetermined voltage. In response, the power management circuit provides a boosted voltage, which is no less than the required voltage, to the selected envelope tracking amplifier. As such, it is possible to enable the selected envelope tracking amplifier to amplify the respective RF signal(s) to the predetermined voltage without increasing cost, footprint, and power consumption of the envelope tracking power management circuit.

Circuits and operating methods thereof for correcting phase errors introduced by amplifiers employing gallium nitride (GaN) transistors are described. The phase errors are caused by trapping effects exhibited by the GaN transistors. The circuits described herein pre-distort the phase of the input signal to compensate for the phase error introduced by the amplifier. Thereby, the phase of the output signal of the amplifier has a reduced phase error. For example, the output signal may have a near zero (or zero) phase error.

Disclosed is a high-power and high-frequency DC-DC converter block for the envelope tracking technique including a step-down power circuit whose output constitutes the output of the DC-DC converter block, the step-down power circuit including at least one HEMT depletion-mode transistor, the DC-DC converter block further including a gate driving circuit of the at least one HEMT depletion-mode transistor of the step-down power circuit. The driving circuit has HEMT depletion-mode transistors configured to drive the gate of the at least one HEMT depletion-mode transistor of the step-down power circuit, and the step-down power circuit is powered by two positive and non-zero power supply voltages, namely a first power supply voltage and a second power supply voltage, the first power supply voltage being greater than the second power supply voltage.

Provided is a power amplification module that includes: a first power amplifier that amplifies a first signal and outputs a second signal; and a first noise removing circuit that is inputted with a first voltage supplied from a DC-DC converter, removes noise from the first voltage in order to generate a second voltage, and outputs the second voltage as a power supply voltage of the first power amplifier.

A circuit including: a power amplifier configured to provide amplified signals to a load; an impedance matching network disposed between the power amplifier and the load, the impedance matching network comprising an adjustable impedance unit; and a feedback loop comprising a rectifier, the rectifier being coupled with an output of the power amplifier, the feedback loop further comprising and impedance control circuit configured to receive a signal from the rectifier and to control the adjustable impedance unit in response to the signal from the rectifier.

A gain control circuit, having an attenuator including first to n-th (n>2) attenuator parts that attenuate an input signal respectively in accordance with first to n-th attenuation control signals to thereby generate an attenuated input signal, a signal amplifier configured to amplify the attenuated input signal, a detector circuit configured to conduct an envelope detection on the amplified attenuated input signal to thereby obtain an amplitude value, a comparator circuit configured to compare the amplitude value with a reference threshold value to thereby generate a comparison result signal, and an attenuator control circuit configured to generate the first to n-th attenuation control signals using the comparison result signal. The attenuation control signals indicate first to n-th attenuation amounts by which the first to n-th attenuator parts respectively attenuate the input signal, and first to n-th time periods during which the first to n-th attenuator parts respectively operate.

Apparatus and methods for programmable low dropout (LDO) regulators for radio frequency (RF) electronics are provided herein. In certain configurations, an LDO regulator for generating a programmable output voltage includes a regulation field-effect transistor (FET) having a drain electrically connected to the LDO regulator's output, an error amplifier that controls a gate of the regulation FET, a feedback circuit that provides a feedback signal to an inverting input of the error amplifier, an output capacitor electrically connected to the LDO regulator's output, and an alternative discharge circuit. When the output voltage of the LDO regulator is programmed from a high voltage level to a low voltage level, the alternative discharge circuit activates to discharge the output capacitor to improve the LDO regulator's transient response.

A supply modulator includes: a voltage generator including output terminals respectively outputting voltages having different levels, and configured to select, in response to a selection control signal corresponding to an envelope signal, at least one of the voltages as a selection supply voltage and to generate the selection supply voltage by performing DC-DC conversion on a power supply voltage; and a switch unit configured to connect an output terminal through which the selection supply voltage is output to a power amplifier, in response to a connection control signal corresponding to the envelope signal.

A power amplifier apparatus, includes an envelope tracking (ET) current bias circuit configured to generate a first ET bias current by calculating a direct current DC, based on a reference voltage, and an ET current, based on an ET voltage, according to an envelope of an input signal; and a power amplifier circuit having a bipolar junction transistor supplied with the first ET bias current and a power voltage to amplify the input signal, wherein an average current of the first ET bias current is controlled to be substantially constant.