According to one or more embodiments of the disclosure, an electronic device may include a power amplifier, a voltage generator, an antenna, and a communication processor. The CP determines whether an output waveform of the transmission signal which is output through the antenna is a first waveform or a second waveform. If the output waveform is the first waveform, the voltage generator generates a first output voltage for amplifying the first waveform by applying a first direct current (DC) power source of one or more first voltages. If the output waveform is the second waveform, the voltage generator generates a second output voltage for amplifying the second waveform by applying a second DC power source of a second voltage shifted by a designated level with respect to the first voltage, based on a peak power of the first waveform and a peak power of the second waveform.

An uplink multiple input-multiple output (MIMO) transmitter apparatus includes a transmitter chain that includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from two original signals to be transmitted. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals match the two original signals in content but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals. By employing this uplink MIMO transmitter apparatus, it is possible to use smaller power amplifiers, which may reduce footprint, power consumption, and costs of the uplink MIMO transmitter apparatus.

A closed-loop switch-mode boost converter includes a switching signal generator circuit, a switch-mode boost amplifier, a filter circuit, and an error amplifier circuit. The switching signal generator circuit receives an input signal and outputs a switching signal. A duty-cycle of the switching signal has a first non-linear relationship to an amplitude of the input signal. The switch-mode boost amplifier receives the switching signal and produces an output signal. An amplitude of the output signal has a second non-linear relationship to the duty-cycle of the switching signal, and the output signal has a linear relationship to the input signal based on the first and second non-linear relationships. The filter circuit receives the output signal and outputs a filtered output signal. The error amplifier circuit receives the input signal and the filtered output signal and produces a feedback control signal. The filtered output signal is adjusted based on the feedback control signal.

A complementary envelope detector contemplates using two pair of mirrored transistors to provide a differential output envelope signal to an associated envelope tracking integrated circuit (ETIC) that supplies control voltages to an array of power amplifiers. While bipolar junction transistors (BJTs) may be used, other exemplary aspects use field effect transistors (FETs). In an exemplary aspect, a first pair are negative channel FETs (nFETs) and a second pair are positive channel FETs (pFETs).

The present disclosure relates to amplifier circuitry (300) that includes a linear amplifier stage (110) that receives an input signal and outputs a first drive signal to an output node (302) and a switching amplifier stage (130) operable to output a second drive signal to the output node (302). A controller (340) is selectively operable in a first dual-amplifier mode, in which switching of the switching amplifier stage is controlled based on a current of the first drive signal, such that the current of the first drive signal does not exceed a first current threshold magnitude; and at least one other mode, in which the controller controls the switching amplifier stage such that the current of the first drive signal may exceed the first current threshold magnitude. The controller (340) selectively controls the mode of operation based on an indication (S.sub.SL) of signal level of the output signal.

Apparatus and methods for power amplifier bias modulation for multi-level supply envelope tracking are provided herein. In certain embodiments, an envelope tracking system includes a power amplifier that amplifies a radio frequency signal, a multi-level supply envelope tracker that generates a power amplifier supply voltage of the power amplifier based on an envelope signal indicating an envelope of the radio frequency signal, and a bias modulation circuit that modulates a bias of the power amplifier based on a voltage level of the power amplifier supply voltage.

Systems and methods include a digital control module that receives and processes audio data for output through a loudspeaker. An analog block receives the audio data and the power control signal and amplifies the audio data for output. A first processing path includes a buffer to delay the audio data, a first component to combine the buffered audio data and anti-noise. A second processing path includes an absolute value block to receive the audio data and an envelope detector to receive the absolute value data and generate a maximum value for the envelope. An anti-noise path includes an absolute value block configured to determine an anti-noise absolute value which is combined with the absolute value anti-noise data. A power generator receives the output from the envelope detector and updates a power level to approximate a minimum powered needed to process the audio signal.

A power amplifier system having a carrier amplifier having a first supply node, a peaking amplifier having a second supply node, and envelope tracking (ET) circuitry is disclosed. The ET circuitry has a first tracking amplifier that generates a first voltage signal at the first supply node, a second tracking amplifier that generates a second voltage signal at the second supply node, and a transistor coupled between the first supply node and the second supply node. A control circuit has a first input coupled to an output of both or either of the first tracking amplifier and the second tracking amplifier and a control output terminal coupled to a control input terminal of the transistor, wherein the control circuit is configured to progressively turn on the transistor to pass current from the first supply node to the second supply node as the peaking amplifier progressively becomes active.

One example includes a device that is comprised of a pre-power amplifier, a power amplifier, a signal path, and a dynamic bias circuit. The pre-power amplifier amplifies an input signal and outputs a first amplified signal. The power amplifier receives the first amplified signal and amplifies the first amplified signal based on a dynamic bias signal to produce a second amplified signal at an output thereof. The signal path is coupled between an output of the pre-power amplifier and an input of the power amplifier. The dynamic bias circuit monitors the first amplified signal, generates the dynamic bias signal, and outputs the dynamic bias into the signal path.

A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.