The present disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting a data transmission rate higher than that of a 4th generation (4G) communication system such as long term evolution (LTE). The present disclosure is to amplify transmission signals in a wireless communication system, and a transmitting device may include an antenna array including a plurality of antenna elements, a plurality of amplification chains for amplifying signals transmitted through the plurality of the antenna elements, and a power supply line for supplying powers to the plurality of the amplification chains. Herein, the powers used by power amplifiers included in at least one amplification chain of the plurality of the amplification chains may be divided by filtering or by independent pads and branch-lines.

A power amplifier circuit includes a first transistor having an emitter electrically connected to a common potential, a base to which a first high-frequency signal is input, and a collector from which a third high-frequency signal is output; a second transistor having an emitter electrically connected to the common potential, a base to which a second high-frequency signal is input, and a collector from which a fourth high-frequency signal is output; a first capacitance circuit electrically connected between the collector of the second transistor and the base of the first transistor; and a second capacitance circuit electrically connected between the collector of the first transistor and the base of the second transistor.

A power amplifier circuit includes a first transistor having an emitter electrically connected to a common potential, a base to which a first high-frequency signal is input, and a collector from which a third high-frequency signal is output; a second transistor having an emitter electrically connected to the common potential, a base to which a second high-frequency signal is input, and a collector from which a fourth high-frequency signal is output; a first capacitance circuit electrically connected between the collector of the second transistor and the base of the first transistor; and a second capacitance circuit electrically connected between the collector of the first transistor and the base of the second transistor.

Envelope tracking systems with modeling for power amplifier supply voltage filtering are provided herein. In certain embodiments, an envelope tracking system includes a supply voltage filter, a power amplifier that receives a power amplifier supply voltage through the supply voltage filter, and an envelope tracker that generates the power amplifier supply voltage. The power amplifier provides amplification to a radio frequency (RF) signal that is generated based on digital signal data, and the envelope tracker generates the power amplifier supply voltage based on an envelope signal corresponding to an envelope of the RF signal. The envelope tracking system further includes digital modeling circuitry that models the supply voltage filter and operates to digitally compensate the digital signal data for effects of the supply voltage filter, such as distortion.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.

Aspects of an envelope tracking operation are described. In some aspects, as part of the envelope tracking operation, a device determines a change in a first set of power amplifier (PA) operating conditions, corresponding to a first look up table (LUT), the first LUT defined by a first LUT equation and a maximum supply voltage value. In some aspects, the device autonomously generates a second LUT equation to define a second LUT, having a second set of corresponding PA operating conditions. In some aspects, the device selects values from the first LUT equation, estimates a slope of the second LUT equation, determines an intercept with a maximum power value, and adjusts a supply voltage input for the PA to a supply voltage according to the maximum power value.

An envelope tracking (ET) circuit and related power amplifier apparatus is provided. An ET power amplifier apparatus includes an ET circuit and a number of amplifier circuits. The ET circuit is configured to provide a number of ET modulated voltages to the amplifier circuits for amplifying concurrently a number of radio frequency (RF) signals. The ET circuit includes a target voltage circuit for generating a number of ET target voltages adapted to respective power levels of the RF signals and/or respective impedances seen by the amplifier circuits, a supply voltage circuit for generating a number of constant voltages, and an ET voltage circuit for generating the ET modulated voltages based on the ET target voltages and a selected one of the constant voltages. By employing a single ET circuit, it may be possible to reduce the footprint and improve heat dissipation of the ET power amplifier apparatus.

Envelope tracking systems with modeling for power amplifier supply voltage filtering are provided herein. In certain embodiments, an envelope tracking system includes a supply voltage filter, a power amplifier that receives a power amplifier supply voltage through the supply voltage filter, and an envelope tracker that generates the power amplifier supply voltage. The power amplifier provides amplification to a radio frequency (RF) signal that is generated based on digital signal data, and the envelope tracker generates the power amplifier supply voltage based on an envelope signal corresponding to an envelope of the RF signal. The envelope tracking system further includes digital modeling circuitry that models the supply voltage filter and operates to digitally compensate the digital signal data for effects of the supply voltage filter, such as distortion.

A power amplifying circuit includes an amplifier that amplifies a radio-frequency signal and a bypass capacitor section connected to a power supply terminal for supplying a power supply voltage to the amplifier. The bypass capacitor section includes a first capacitor, a second capacitor, and a first switch circuit. The first capacitor includes a first end connected to a power supply path, and a second end. The second capacitor includes a first end connected to the second end of the first capacitor and a second end connected to ground. The first switch circuit includes a first terminal connected to the second end of the first capacitor and the first end of the second capacitor, and a second terminal connected to the ground. The first switch circuit switches between connection and non-connection between the second end of the first capacitor and the ground.

A wideband envelope modulator comprises a direct current (DC)-to-DC switching converter connected in series with a linear amplitude modulator (LAM). The DC-DC switching converter includes a pulse-width modulator that generates a PWM signal with modulated pulse widths representing a time varying magnitude of an input envelope signal or a pulse-density modulator that generates a PDM signal with a modulated pulse density representing the time varying magnitude of the input envelope signal, a field-effect transistor (FET) driver stage that generates a differential PWM or PDM drive signal, a high-power output switching stage that is driven by the PWM or PDM drive signal, and an output energy storage network including a low-pass filter (LPF) of order greater than two that filters a switching voltage produced at an output switching node of the high-power output switching stage.