Patent classifications
H03F2200/102
Electronic circuit and method of controlling three-level switching converters
A method including producing an electronic circuit. The method can include providing a first circuit portion, a second circuit portion, a flying capacitor voltage comparator, an output switching circuit, an electronic circuit first output node, and/or an electronic circuit second output node. The electronic circuit first output node can be electrically coupled to a first gate terminal of a switching converter. The electronic circuit second output node can be electrically coupled to a second gate terminal of the switching converter. The method also can include electrically coupling a voltage sensor output terminal of the flying capacitor voltage comparator to the first circuit second input node of the first circuit portion and the second circuit second input node of the second circuit portion. Other embodiments are disclosed.
Power supply circuit
A power supply circuit supplies a variable voltage to a power amplifier that amplifies a radio-frequency signal, and includes a transistor and a current detecting resistor. The transistor includes a collector or drain that is supplied with a fixed voltage from a fixed voltage source, a base or gate that receives an envelope signal tracking an envelope of the radio-frequency signal, and an emitter or source that outputs the variable voltage that is based on the envelope signal. The current detecting resistor is electrically connected between the fixed voltage source and the collector or drain of the transistor.
Optocoupler emulating input stage for digital isolators
A digital isolator comprising a set of bipolar transistors and an inductor capacitor (LC) oscillator coupled to the set of bipolar transistors in series, wherein the LC oscillator is configured to be turned on and off based on the current applied to the set of bipolar transistors or the LC oscillator and generate a set of differential signals based on the current flowing through the set of bipolar transistors and mimicking the operational characteristics of an optocoupler.
Single-wire peer-to-peer bus
A single-wire peer-to-peer (P2P) bus apparatus is provided. The single-wire P2P bus apparatus includes a first peer device and a second peer device(s) coupled to a single-wire bus that correspond to a first bus access priority and a second bus access priority(s), respectively. Any of the first peer device and the second peer device(s) can contend for access to the single-wire bus by asserting a bus contention indication(s) when the single-wire bus is in a defined bus state. A winner for the single-wire bus may be a peer device having a highest bus access priority among those peer devices asserting the bus contention indication(s). In this regard, any peer device on the single-wire bus can have a chance to initiate communications over the single-wire bus, thus making it possible for the single-wire bus to function based on bidirectional P2P bus architecture capable of supporting more application and/or deployment scenarios.
Envelope tracking amplifier apparatus
An envelope tracking (ET) amplifier apparatus is provided. The ET amplifier apparatus includes an ET integrated circuit (ETIC) having a number of voltage circuits coupled to a common port and configured to generate an ET voltage(s) based on a number of ET target voltages, respectively. In examples discussed herein, a selected voltage circuit(s) in the ETIC receives a maximum ET target voltage among all the ET target voltages and is configured to generate a reference ET voltage based on the maximum ET target voltage. As such, another voltage circuit(s), which happens to receive the maximum ET target voltage, may simply treat the reference ET voltage as a respective ET voltage(s) instead of generating the respective ET voltage(s). As a result, it may be possible to opportunistically turn off or reduce functionality of the voltage circuit(s) to help reduce peak battery current and improve heat dissipation in the ET amplifier apparatus.
Apparatus and method of power management using envelope stacking
An envelope stacking power amplifier system reduces current for a given output power level without sacrificing the ability to support large voltage swings at saturation and therefore increases efficiency at the maximum linear operating power and all power levels below that. The system includes a stack/unstack controller including circuitry configured to switch the RF power amplifier system between a stacked mode in which first and second RF amplifiers are coupled in a stacked configuration and an unstacked mode in which the first and second RF amplifiers are coupled in an unstacked configuration in response to one or more mode-control signals, the stacked configuration providing reduced current compared to the unstacked configuration.
POWER AMPLIFIER CIRCUIT
A power amplifier circuit has an input node from which an input signal, which is a high-frequency signal, is inputted and an output node to which the input signal is amplified by a differential amplifier circuit to be outputted as an output signal. The power amplifier circuit includes a balun transformer (second balun transformer) including an input-side winding that has a substantially center to which a power-supply voltage is supplied and that is connected between differential outputs of the differential amplifier circuit, and an output-side winding that is coupled to the input-side winding via an electromagnetic field and that has one end connected to a reference potential; and a capacitive element (capacitor) provided between another end (node) of the output-side winding and the output node.
Envelope tracking amplifier apparatus
An envelope tracking (ET) amplifier apparatus is provided. The ET amplifier apparatus includes an ET integrated circuit (IC) (ETIC) and a distributed ETIC (DETIC) coupled to the ETIC. The DETIC may be configured to provide a distributed voltage to a distributed amplifier circuit for amplifying a distributed radio frequency (RF) signal. In examples discussed herein, the ETIC is configured to generate a low-frequency current, which can affect the distributed voltage, at a desired level based on a feedback signal received from the DETIC. The DETIC may be configured to generate the feedback signal based on an indication(s) related to the distributed voltage. By dynamically adjusting the low-frequency current, and thus the distributed voltage, based on the feedback signal, it may be possible to maintain operating efficiency of the distributed amplifier circuit across a wider range of modulation bandwidth with minimal cost and/or size impact on the ET amplifier apparatus.
APPARATUS AND METHOD FOR CALIBRATING AN ENVELOPE TRACKING LOOKUP TABLE
An apparatus and method for calibrating an envelope tracking (ET) lookup table (LUT) are provided. An ET power management apparatus includes a power amplifier configured to amplify a radio frequency (RF) signal from a time-variant input power to a time-variant output power linearly related to the time-variant input power. A calibration circuit is employed to receive a time-variant output power feedback nonlinearly related to the time-variant input power, determine a linear relationship between the time-variant input power and the time-variant output power based on the time-variant output power feedback, and calibrate the ET LUT based on the determined linear relationship. As a result, it is possible to improve accuracy of the ET LUT to thereby improve operating efficiency and linearity of the power amplifier.
ENVELOPE TRACKING RADIO FREQUENCY FRONT-END CIRCUIT
An envelope tracking (ET) radio frequency (RF) front-end circuit is provided. The ET RF front-end circuit includes an ET integrated circuit(s) (ETIC(s)), a local transceiver circuit, a target voltage circuit(s), and a number of power amplifiers. The local transceiver circuit receives an input signal(s) from a coupled baseband transceiver and generates a number of RF signals. The target voltage circuit(s) generates a time-variant ET target voltage(s) based on the input signal(s). The ETIC(s) generates multiple ET voltages based on the time-variant ET target voltage(s). The power amplifiers amplify the RF signals based on the ET voltages. Given that the time-variant ET target voltage(s) is generated inside the self-contained ET RF front-end circuit, it is possible to reduce distortion in the time-variant ET target voltage(s), thus helping to improve operating efficiency of the power amplifiers, especially when the RF signals are modulated with a higher modulation bandwidth (e.g., ≥200 MHz).