A wireless communication system includes a power amplifier (PA) configured to receive a radio frequency (RF) input signal and to produce a PA output signal, the PA output signal being an amplified version of the RF input signal. A sensor subsystem is configured to perform asynchronous statistical sampling of the RF input signal and of the PA output signal and to generate a sensor subsystem output. A controller, in communication with the sensor subsystem, is configured to obtain the sensor subsystem output and to infer performance of the PA, and may control one or more of a plurality of internal PA parameters. The controller may include a neural network processor to associate a particular statistical input/output characterization with a particular inferred performance for the PA. Compared to known approaches, the system is scalable and achieves lower power consumption, and is configured to obtain information about linearity performance.

A transmitter circuit has a signal input for receiving an analog input signal and a local oscillator (LO) input for receiving an LO signal. A mixer circuit has a first input, a second input, and an output. The second input of the mixer circuit is connected to a signal input of the transmitter circuit. A PA circuit has an input connected to the output of the mixer circuit, and an output. A control circuit generates a phase-control signal and a gain-control signal in response to an envelope of the analog input signal. A phase-control circuit generates a phase-adjusted LO signal in response to the LO signal and the phase-control signal and supplies the phase-adjusted LO signal to the first input of the mixer circuit. A gain-control circuit controls a gain of the transmitter circuit in response to the gain-control signal.

A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.

A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.

An envelope tracking power amplifier module and an envelope tracking method are provided. The envelope tracking power amplifier module includes a power amplifier and a linear amplifier coupled to the power amplifier and configured to receive and amplify an envelope signal and provide the amplified envelope signal to the power amplifier. The power amplifier is configured to receive and amplify a signal according to the amplified envelope signal. The envelope tracking method includes: providing a signal to the power amplifier; deriving an envelope phase of the signal, the envelope phase corresponding to an output power of the power amplifier; providing an envelope signal including the envelope phase to the envelope tracking module; the envelope tracking module providing the amplified envelope signal to the power amplifier; and the power amplifier amplifying the signal according to the amplified envelope signal and outputting the amplified signal at the output power.

An envelope tracking (ET) amplifier circuit is provided. The ET amplifier circuit includes an ET voltage circuit configured to generate an ET modulated voltage based on a supply voltage for amplifying a radio frequency (RF) signal. The ET modulated voltage corresponds to a time-variant voltage envelope, which can be misaligned from a time-variant signal envelope of the RF signal due to an inherent temporal delay in the ET amplifier circuit. A voltage processing circuit is provided in the ET amplifier circuit to reduce dynamic range of the ET modulated voltage to help improve delay sensitivity in the ET amplifier circuit. A control circuit is configured to reduce the supply voltage according to the dynamic range to help maintain system-wide efficiency of the ET amplifier circuit at a defined level. As such, it may be possible to improve delay sensitivity and maintain sufficient system-wide efficiency in the ET amplifier circuit.

A multistage power amplifier includes a first amplification circuit disposed in a front stage of the multistage power amplifier, a first bias circuit configured to output a first bias current, a bias path circuit, an envelope detection circuit, and an alternating current (AC) path circuit. The envelope detection circuit is configured to output a direct current (DC) detection voltage based on an envelope signal of a radio frequency (RF) signal input to the first amplification circuit. The AC path circuit is configured to branch an AC signal from an input terminal of the first amplification circuit and transfer the AC signal to the first bias circuit, upon the first amplification circuit operating in a high power driving region based on the DC detection voltage. The first bias circuit is configured to compensate for the first bias current based on the AC signal transferred through the AC path circuit.

A signal processing method and system includes a baseband signal baseband signal processing module configured to perform slow envelope processing on a first signal, to obtain an envelope value E(n) of the first signal on which the slow envelope processing has been performed, obtain a phase value (n) based on E(n), where (n) and E(n) are in a linear relationship, and separate the first signal into a second signal and a third signal based on (n), where a phase difference between the second signal and the third signal is 2 (n), an amplifier configured to amplify the second signal and the third signal, and a synthesizer is configured to combine the amplified second signal and third signal to obtain a fourth signal.

Envelope tracking systems for power amplifiers are provided herein. In certain embodiments, an envelope tracker is provided for a power amplifier that amplifies an RF signal. The envelope tracker includes a multi-level switching circuit having an output that provides an output current that changes in relation to an envelope signal indicating an envelope of the RF signal when the envelope tracker is operating in an envelope tracking mode. The multi-level switching circuit includes a multi-level supply (MLS) modulator that receives multiple regulated voltages of different voltage levels, and an MLS control circuit that controls the selection of the MLS modulator over time based on the envelope signal. When transitioning the MLS modulator from selection of one regulated voltage level to another regulated voltage level, the MLS control circuit provides a soft transition to gradually switch the regulated voltage levels.

Disclosed herein are front-end modules that support carrier aggregation. Wireless communication configurations are disclosed that include a plurality of such front-end modules to support uplink and/or downlink carrier aggregation. Individual front end modules include a power amplifier module to amplify signals received at a transceiver port and a low-noise amplifier module to amplify signals received at an antenna port. The front-end modules include a multiplexer and an antenna switch module with a plurality of filters and duplexers between them along a corresponding plurality of paths. One path processes frequency division duplex (FDD) signals and another path processes time division duplex (TDD) signals. The front-end modules amplify TDD signals while received FDD signals are directed off module for amplification.