Apparatus and methods for calibration of envelope trackers are provided. In one embodiment, a power amplifier system includes a VGA that amplifies an RF input signal to generate an amplified RF input signal, a power amplifier that amplifies the amplified RF input signal to generate an RF output signal, and an envelope tracker that generates a supply voltage for the power amplifier. The envelope tracker includes a scaling module that generates a scaled envelope signal based on a power control level (PCL) signal and an envelope signal that changes in relation to an envelope of the RF input signal. The envelope tracker further includes a calibration module that controls an amount of scaling of the scaled envelope signal based on calibration data to compensate for an envelope amplitude misalignment of the envelope tracker. The envelope tracker controls the voltage level of the supply voltage based on the scaled envelope signal.

Embodiments of an RF amplifier include a transistor with a control terminal and first and second current carrying terminals, and a shunt circuit coupled between the first current carrying terminal and a ground reference node. The shunt circuit includes a first shunt inductance, a second shunt inductance, and a shunt capacitor coupled in series. The second shunt inductance and the shunt capacitor form a series resonant circuit in proximity to a center operating frequency of the amplifier, and an RF cold point node is present between the first and second shunt inductances. The RF amplifier also includes a video bandwidth circuit coupled between the RF cold point node and the ground reference node.

A distributed amplifier with improved stabilization includes an input transmission circuit, an output transmission circuit, at least one cascode amplifier coupled between said input and output transmission circuits. Each cascode amplifier includes a common-gate configured transistor coupled to the output transmission circuit, and a common-source configured transistor coupled between the input transmission circuit and the common-gate configured transistor. The distributed amplifier also includes a non-parasitic resistance and capacitance coupled in series between a drain and a gate of at least one of the common-gate configured transistors for increasing the amplifier stability.

A microwave amplifier including: a bias circuit that includes a line having an electrical length of one quarter the wavelength at the frequency configured to be amplified by the microwave amplifier and being connected between the output terminal of an amplifier and a bias voltage source, and a capacitor connected between a terminal where the line is connected to the bias voltage source and a ground that defines the reference potential of the microwave amplifier; and a resonant circuit that includes a resistor and a capacitor connected in series between the ground and the terminal where the line is connected to the bias voltage source.

Optimization methods via various circuital arrangements for amplifier with variable supply power are presented. In one embodiment, a switch can be controlled to include or exclude a feedback network in a feedback path to the amplifier to adjust a response of the amplifier dependent on a region of operation of the amplifier arrangement (e.g. linear region or compression region).

Disclosed are systems, devices, and methodologies to reduce harmonics in a radio frequency output signal. A power amplifier system comprises a power amplifier and a tunable output matching network electrically connected between the output of the power amplifier and an output of the tunable output matching network. The tunable output matching network reduces second-order harmonics in an amplified radio frequency signal when the power amplifier operates in a low frequency mode. The tunable output matching network includes traps such as a series inductor and a first capacitor in series with a first switch, a second capacitor in series with a second switch, and a third capacitor in series with a third switch, where the traps are tuned to selected harmonic frequencies when the power amplifier operates in the low frequency band of the operating band of frequencies.

A transistor stack can include a combination of floating and body tied devices. Improved performance of the RF amplifier can be obtained by using a single body tied device as the input transistor of the stack, or as the output transistor of the stack, while other transistors of the stack are floating transistors. Transient response of the RF amplifier can be improved by using all body tied devices in the stack.

Methods and devices to minimize or reduce phase discontinuity between different gain modes (including bypass, active and passive modes) with reduced increase in circuit size (footprint or number of components) and complexity, without impacting other performance parameters, are disclosed. Phase shifter elements that can be disposed in both the active and passive bypass paths are also described. Moreover, devices using the same reconfigurable phase shifter elements in both active and bypass modes are described. Components of the phase shifters can also perform output matching when the phase shifters are implemented as part of an RF receiver front-end.

Methods and devices to minimize or reduce phase discontinuity between different gain modes (including bypass, active and passive modes) with reduced increase in circuit size (footprint or number of components) and complexity, without impacting other performance parameters, are disclosed. Phase shifter elements that can be disposed in both the active and passive bypass paths are also described. Moreover, devices using the same reconfigurable phase shifter elements in both active and bypass modes are described. Components of the phase shifters can also perform output matching when the phase shifters are implemented as part of an RF receiver front-end.