Patent classifications
H03F2200/15
Adaptive impedance power amplifier
The present invention relates to a method, of providing adaptive impedance in a Power Amplifier (PA), by providing more than one transistors in which one transistor is used to change the load line or to linearize the input signal by adapting the biasing of each transistor, wherein the transistors are connected in parallel.
INDUCTOR CURRENT RECONSTRUCTION CIRCUIT, CONTROLLER AND SWITCHED-MODE POWER SUPPLY
An inductor current reconstruction circuit, a controller and a switched-mode power supply are disclosed. The inductor current reconstruction circuit includes an AC component reconstruction module having a charge/discharge capacitor, which is coupled to an inductor and configured to charge or discharge the charge/discharge capacitor, based on voltage difference between voltages at opposing ends of the inductor, or on voltage difference between a voltage at one end of the inductor and another voltage associated with the voltage at the end of the inductor, at a current proportional to the voltage difference. The AC component reconstruction module outputs a reconstructed signal characterizing an AC component in a current through the inductor. Inductor current reconstruction can be achieved without detecting ON/OFF states of power transistors. This makes the precision of inductor current reconstruction immune from influence of both any voltage drop across power transistors and simultaneous turn-off of upper and lower power transistors.
SYSTEMS AND METHODS FOR WIRELESS POWER DELIVERY
Disclosed are systems configured to deliver wireless charging power to electronic devices and methods for delivering wireless charging power. In some implementations, a system can include a programmable radio-frequency generator capable of generating a beam of electromagnetic pulsed radiation and plurality of solid-state amplifiers to amplify the beam of electromagnetic pulsed radiation. The amplified beam of electromagnetic pulsed radiation can be configured to wirelessly charge electronic devices at distances greater than about 100 meters.
BIAS CIRCUIT AND POWER AMPLIFIER CIRCUIT
A bias circuit includes: a first transistor having an emitter or a source which supplies a bias to an amplifier operating by a power source voltage through a first resistive element and a base or a gate; a first capacitor having a first end electrically connected to the base or the gate of the first transistor and a second end connected to a ground; and a second transistor having a collector or a drain electrically connected to the base or the gate of the first transistor, a base or a gate electrically connected to the base or the gate of the first transistor, and an emitter or a source connected to a node which is supplied with a signal with experience of being amplified by the amplifier and the power source voltage.
Radio apparatus
An apparatus is disclosed, comprising means for storing reference data indicative of characteristics for each of two or more amplifiers for amplifying signals in two or more respective bands, the reference data including voltage characteristics required by the particular amplifier to achieve a particular output power for a range of output power values for its respective frequency band. The apparatus may comprise means for receiving at least a first required output power for a first amplifier and a second required output power for a second amplifier, and determining, based on the reference data, the voltage characteristics required for the first amplifier to achieve the first required output power and the voltage characteristics required for the second amplifier to achieve the second required output power.
Differential amplifier with variable neutralization
Disclosed examples include differential amplifier circuits and variable neutralization circuits for providing an adjustable neutralization impedance between an amplifier input node and an amplifier output node, including neutralization impedance T circuits with first and second impedance elements in series between the amplifier input and output, and a third impedance element, including a first terminal connected to a node between the first and second impedance elements, and a second terminal connected to a transistor. The transistor operates according to a control signal to control the neutralization impedance between the amplifier input node and the amplifier output node.
Automatic bias controller for a pulsed power amplifier
Systems and methods for automatically controlling the bias in a pulsed power amplifier include components for measuring the current in an amplifier, comparing the measured value with the desired value, modifying the bias, and controlling the bias applied to the power amplifier. A measurement circuit converts the measured current to a voltage, and a comparator compares a measured voltage with a reference voltage to continuously indicate whether the amplifier current is less than a desired quiescent value. A circuit controls the level of the gate-bias (Vg) during a pulse, such as with a pulse width modulator. The measurement of the amplifier current is registered after the bias is enabled, but before the signal pulse. Drive control logic implements a control algorithm for adjusting the gate value in between pulses and in time to be used for the next pulse.
APPARATUS AND METHODS OF CALIBRATING A POWER AMPLIFIER SYSTEM TO COMPENSATE FOR ENVELOPE AMPLITUDE MISALIGNMENT
Apparatus and methods of calibrating a power amplifier system to compensate for envelope amplitude misalignment are provided. In certain configurations, a method of calibrating a power amplifier system includes generating a supply voltage of a power amplifier using an envelope tracker based on shaping a scaled envelope signal using shaping data generated at a target gain compression, controlling a variable gain of a variable gain amplifier based on a gain control level signal, changing the variable gain by adjusting the gain control level signal using a calibration module, monitoring an output of the power amplifier to determine an amount of variable gain at which a detected gain compression of the power amplifier corresponds to the target gain compression of the shaping data, and calibrating the power amplifier system to compensate for envelope amplitude misalignment based on the determined amount of variable gain.
Regulation of an RF amplifier
A radiofrequency (RF) amplifier includes an input terminal, an output terminal, and a power supply and biasing stage having an output coupled to the input terminal. An amplification stage of the RF amplifier includes a first transistor having a control terminal coupled to the input terminal and a first conduction terminal coupled to the output terminal. The power supply and biasing stage is configured to generate a bias voltage at the control terminal of the first transistor to simultaneously regulate a power supply voltage of the amplification stage to a first voltage and a bias current of the amplification stage to a first current.
DOHERTY AMPLIFIER SYSTEM
A Doherty amplifier system (10) is disclosed having a carrier amplifier (12) with a carrier drain bias input (14), and a peak amplifier (24) having a peak drain bias input (26), and a peak gate bias input (28). Also included is a programmable bias controller (40) having a data interface configured to receive peak-to-average power ratio (PAPR) data associated with a basestation. The programmable bias controller (40) further includes a processor (46) coupled to the data interface and configured, in response to the PAPR data, to determine and apply bias levels to the carrier drain bias input (14), the peak drain bias input (26), and the peak gate bias input (28) to provide an amplifier efficiency between 30% and 78.5%.