An integrated circuit arrangement for a microphone, a microphone system and a method for adjusting circuit parameters of the microphone are disclosed. In an embodiment an integrated circuit includes an amplifier circuit with a first switchable network circuit for adjusting an amplifier current of the amplifier circuit, the first switchable network circuit comprising a plurality of switches (SW1, . . . , SWx) each coupled with a first control port of the first switchable network circuit and a control unit coupled with the first control port of the first switchable network circuit and configured to control a setting of the respective switches (SW1, . . . , SWx) of the first switchable network circuit.

A linearization circuit that reduces intermodulation distortion in an amplifier output receives a first signal that includes a first frequency and a second frequency and generates a difference signal having a frequency approximately equal to the difference of the first frequency and the second frequency. The linearization circuit generates an envelope signal based at least in part on a power level of the first signal and adjusts a magnitude of the difference signal based on the envelope signal. When the amplifier receives the first signal at an input terminal and the adjusted signal at a second terminal, intermodulation between the adjusted signal and the first signal cancels at least a portion of the intermodulation products that result from the intermodulation of the first frequency and the second frequency.

Various envelope tracking amplifiers are presented that can be switched between an ET (envelope tracking) mode and a non-ET mode. Switches and/or tunable components are utilized in constructing the envelope tracking amplifiers that can be switched between the ET mode and the non-ET mode.

Envelope-tracking control techniques are disclosed for highly-efficient radio frequency (RF) power amplifiers. In some cases, a III-V semiconductor material (e.g., GaN or other group III material-nitride (III-N) compounds) MOSFET including a high-k gate dielectric may be used to achieve such highly-efficient RF power amplifiers. The use of a high-k gate dielectric can help to ensure low gate leakage and provide high input impedance for RF power amplifiers. Such high input impedance enables the use of envelope-tracking control techniques that include gate voltage (Vg) modulation of the III-V MOSFET used for the RF power amplifier. In such cases, being able to modulate Vg of the RF power amplifier using, for example, a voltage regulator, can result in double-digit percentage gains in power-added efficiency (PAE). In some instances, the techniques may simultaneously utilize envelope-tracking control techniques that include drain voltage (Vd) modulation of the III-V MOSFET used for the RF power amplifier.

An audio reproduction apparatus is shown and includes an amplifier with a power amplification stage having transistors in a push-pull arrangement. A bias generator biases the transistors with a standing current. A processor receives a data stream comprising digital samples of an analog audio signal and analyzes the peak level of each group. It then determines the appropriate standing currents to maintain Class A operation of the power amplification stage given the peak levels of each of the groups. A digital to analog converter produces an analog input signal for the input stage of the amplifier from the data stream. A feedforward path between the processor and the bias generator allows the standing current to be adjusted prior to the arrival of the analog input signal in the power amplification stage.

A circuit comprises an amplifier and a bias circuit. The amplifier comprises an output transistor comprising a source electrode, a drain electrode, and a gate electrode. The bias circuit comprises: a first control loop configured to set a first quiescent bias for the output transistor based on a first value of a first control voltage and a second value of a second control voltage, wherein the first quiescent bias is configured to put the output transistor in an on state; and a second control loop configured to set a second quiescent bias for the output transistor based on the first value of the first control voltage and the second value of the second control voltage. The second quiescent bias is configured to put the output transistor in an off state and to increase an insertion loss of the amplifier when the output transistor is in the off state.

Disclosed examples include differential amplifier circuits and variable neutralization circuits for providing an adjustable neutralization impedance between an amplifier input node and an amplifier output node, including neutralization impedance T circuits with first and second impedance elements in series between the amplifier input and output, and a third impedance element, including a first terminal connected to a node between the first and second impedance elements, and a second terminal connected to a transistor. The transistor operates according to a control signal to control the neutralization impedance between the amplifier input node and the amplifier output node.

A radio frequency (RF) power amplifier circuit includes an input and an output. A power amplifier transistor has a first terminal connected to the input, a second terminal connected to the output, and a third terminal defined by a degeneration inductance. A first capacitor is connected to the third terminal of the power amplifier transistor, along with a negative capacitance circuit connected in series with the first capacitor. The negative capacitance and the first capacitor define a series resonance at a predefined operating frequency band, which shunts the degeneration inductance of the third terminal.

A method, system and apparatus provide operation of an RF amplifier at a power level responsive to detected or expected conditions such as weather attenuation.

Systems and methods for automatically controlling the bias in a pulsed power amplifier include components for measuring the current in an amplifier, comparing the measured value with the desired value, modifying the bias, and controlling the bias applied to the power amplifier. A measurement circuit converts the measured current to a voltage, and a comparator compares a measured voltage with a reference voltage to continuously indicate whether the amplifier current is less than a desired quiescent value. A circuit controls the level of the gate-bias (Vg) during a pulse, such as with a pulse width modulator. The measurement of the amplifier current is registered after the bias is enabled, but before the signal pulse. Drive control logic implements a control algorithm for adjusting the gate value in between pulses and in time to be used for the next pulse.