An audio reproduction apparatus is shown and includes an amplifier with a power amplification stage having transistors in a push-pull arrangement. A bias generator biases the transistors with a standing current. A processor receives a data stream comprising digital samples of an analog audio signal and analyzes the peak level of each group. It then determines the appropriate standing currents to maintain Class A operation of the power amplification stage given the peak levels of each of the groups. A digital to analog converter produces an analog input signal for the input stage of the amplifier from the data stream. A feedforward path between the processor and the bias generator allows the standing current to be adjusted prior to the arrival of the analog input signal in the power amplification stage.

In an RF transmitter, a digital predistortion circuit receives a sequence of input sample blocks, and performs a digital predistortion process to produce a predistorted output signal. The digital predistortion process includes selecting a set of predistortion coefficients for an input sample block from a plurality of different sets of predistortion coefficients. Each of the plurality of different sets of predistortion coefficients is associated with a different combination of one of a plurality of time slices within a radio frame and one of a plurality of power ranges. The selected set of predistortion coefficients is associated with a time slice within which the input sample block is positioned and a power range calculated for the input sample block based on block power statistics of the sample block. The process also includes applying the selected set of predistortion coefficients to the input sample block to produce the predistorted output signal.

A linearization circuit that reduces intermodulation distortion in an amplifier output receives a first signal that includes a first frequency and a second frequency and generates a difference signal having a frequency approximately equal to the difference of the first frequency and the second frequency. The linearization circuit generates an envelope signal based at least in part on a power level of the first signal and adjusts a magnitude of the difference signal based on the envelope signal. When the amplifier receives the first signal at an input terminal and the adjusted signal at a second terminal, intermodulation between the adjusted signal and the first signal cancels at least a portion of the intermodulation products that result from the intermodulation of the first frequency and the second frequency.

In an RF transmitter, a digital predistortion circuit receives a sequence of input sample blocks, and performs a digital predistortion process to produce a predistorted output signal. The digital predistortion process includes selecting a set of predistortion coefficients for an input sample block from a plurality of different sets of predistortion coefficients. Each of the plurality of different sets of predistortion coefficients is associated with a different combination of one of a plurality of time slices within a radio frame and one of a plurality of power ranges. The selected set of predistortion coefficients is associated with a time slice within which the input sample block is positioned and a power range calculated for the input sample block based on block power statistics of the sample block. The process also includes applying the selected set of predistortion coefficients to the input sample block to produce the predistorted output signal.

A radiofrequency (RF) amplifier includes an input terminal, an output terminal, and a power supply and biasing stage having an output coupled to the input terminal. An amplification stage of the RF amplifier includes a first transistor having a control terminal coupled to the input terminal and a first conduction terminal coupled to the output terminal. The power supply and biasing stage is configured to generate a bias voltage at the control terminal of the first transistor to simultaneously regulate a power supply voltage of the amplification stage to a first voltage and a bias current of the amplification stage to a first current.

A radio frequency (RF) power amplifier circuit includes an input and an output. A power amplifier transistor has a first terminal connected to the input, a second terminal connected to the output, and a third terminal defined by a degeneration inductance. A first capacitor is connected to the third terminal of the power amplifier transistor, along with a negative capacitance circuit connected in series with the first capacitor. The negative capacitance and the first capacitor define a series resonance at a predefined operating frequency band, which shunts the degeneration inductance of the third terminal.

An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor.

Control systems and methods for power amplifiers operating in envelope tracking mode are presented. A set of corresponding functions and modules are described and various possible system configurations using such functions and modules are presented.

An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor.

This application relates to methods and apparatus for driving a transducer connected between two output nodes in a bridge-tied-load configuration. A driver receives first and second supply voltages and has charge pumps that generate respective first and second boosted voltages. The driver is operable in a first driver mode in which each output node is modulated between the first and second supply voltage; a second driver mode in which one output nodes is modulated between the first and second supply voltages and the other output node is modulated between either the first boosted voltage and the first supply voltage or between the second supply voltage and the second boosted voltage; and a third driver mode in which one of the output nodes is modulated between the first supply voltage and the first boosted voltage and the other output node is modulated between the second supply voltage and the second boosted voltage.