Patent classifications
H03F2200/18
Voltage supply circuit and power supply unit delivering constant power
A voltage supply circuit includes a rectifier circuit, a charging circuit, a feedback circuit and an energy storage circuit. The rectifier circuit is used to receive an input voltage to generate a rectified energy. The charging circuit is coupled to the rectifier circuit and has a modulation input terminal and an energy supply terminal. The modulation input terminal is used to receive a modulation voltage, and the energy supply terminal is used to selectively output a charging current according to the modulation voltage. The feedback circuit is used to receive a high voltage signal and a supply voltage, and output the modulation voltage to the modulation input terminal. The feedback circuit is used to adjust the modulation voltage according to a difference between the supply voltage and a reference voltage. The energy storage circuit is charged by the charging current to pull up the supply voltage.
Transistor package, amplification circuit including the same, and method of forming transistor
A transistor package according to one exemplary embodiment includes main transistors and a sub-transistor placed in the same package as the main transistors and having a smaller size than the main transistors. It is thereby possible to provide a transistor package with more versatility capable of forming various types of Doherty amplification circuits such as a Doherty amplification circuit with auto-biasing function and an extended Doherty amplification circuit with desired operating characteristics, an amplification circuit including the same, and a method of forming a transistor.
CIRCUITS AND OPERATING METHODS THEREOF FOR MONITORING AND PROTECTING A DEVICE
Circuits for protecting devices, such as gallium nitride (VcclGaN) devices, and operating methods thereof are described. The circuits monitor a magnitude of the current in a device and reduce the magnitude of the current and/or shut down the device responsive to the magnitude of the current exceeding a threshold. These circuits safeguard devices from damaging operating conditions to prolong the operating life of the protected devices.
Balanced differential transimpedance amplifier with single ended input and balancing method
A balanced differential transimpedance amplifier with a single-ended input operational over a wide variation in the dynamic range of input signals. A threshold circuit is employed to either or a combination of (1) generate a varying decision threshold to ensure a proper slicing over a wide range of input current signal levels; and (2) generate a bias current and voltage applied to an input of a transimpedance stage to cancel out a dependence of the transimpedance stage voltage input on input current signal levels.
Power amplifier and method of controlling output of power amplifier
A power amplifier may include a first amplifying circuit configured to amplify an input RF signal; a second amplifying circuit connected to the first amplifying circuit in parallel configured to amplify the input RF signal; and a controller connected to at least one of the first amplifying circuit and the second amplifying circuit and configured to output a control signal in order to control an on-off state of at least one of the first amplifying circuit and the second amplifying circuit. Such an approach provides high efficiency without adding significant complexity to the power amplifier.
Gate drivers for stacked transistor amplifiers
Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit and stacked transistors standby current during operation in the standby mode and to reduce impedance presented to the gates of the stacked transistors during operation in the active mode while maintaining voltage compliance of the stacked transistors during both modes of operation.
Power amplifier bias modulation for low bandwidth envelope tracking
Apparatus and methods for power amplifier bias modulation for low bandwidth envelope tracking are provided herein. In certain embodiments, a power amplifier system for a mobile device includes a power amplifier that amplifies an RF signal and a low bandwidth envelope tracker that generates a power amplifier supply voltage for the power amplifier based on an envelope of the RF signal. The envelope tracking system further includes a bias modulation circuit that modulates a bias signal of the power amplifier based on a voltage level of the power amplifier supply voltage.
DIFFERENTIAL AMPLIFIERS
A differential amplifier comprises: a long tailed pair transistor configuration comprising a differential pair of transistors and a tail transistor; and a replica circuit configured to vary a feedback current in the replica circuit to match a replica voltage to a reference voltage, wherein varying the feedback current in the replica circuit 4 provides a bias voltage to the tail transistor in the long tailed pair which controls a tail current through the tail transistor to determine a common mode voltage in the long tailed pair.
Standby voltage condition for fast RF amplifier bias recovery
Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit standby current during operation in the standby mode while allowing a quick recovery to normal operating conditions of the amplifier. Biasing an input transistor of the stacked transistors can be obtained by using a replica stack circuit.
ACTIVE RC FILTERS
An operational amplifier comprises: a first amplifier stage 4 comprising a first differential pair of transistors 8, 10 arranged to receive and amplify a differential input signal 18, 20 thereby providing a first differential output signal 22, 24; and a second amplifier stage 6 comprising a second differential pair of transistors 26, 28 arranged to receive and amplify the first differential output signal 22, 24 thereby providing a second differential output signal 38, 40.