An amplifier package includes a plurality of input leads, a plurality of transistor amplifiers having inputs respectively coupled to one of the plurality of input leads, and a quadrature hybrid coupler within the amplifier package and coupled between the plurality of input leads and the plurality of transistor amplifiers, wherein the quadrature hybrid coupler is configured to divide an input signal received from a first of the plurality of input leads between the plurality of transistor amplifiers.

The present invention relates to a RF amplifier circuit arrangement for amplifying at least one RF input signal to an output signal for delivery to a load. The RF amplifier circuit arrangement uses a simple and low-cost RF clipping circuit within a load modulated balanced amplifier arrangement which passes RF input signals to output linearly up to the signal input reaches a predefined amplitude. Beyond that predefined amplitude the clipping circuit clips excess amplitudes. The present invention further relates to an electronic device.

An amplifier circuit arrangement for amplifying at least one input signal to an output signal for delivery to a load. The amplifier circuit arrangement includes at least one four-port hybrid coupler, a main amplifier having an input terminal for receiving a first input signal and coupled to a first port of the hybrid coupler, an auxiliary amplifier having an input terminal for receiving a second input signal and coupled to the second port of the hybrid coupler, a negative resistance amplifier circuit coupled to the third port of the hybrid coupler. The negative resistance amplifier circuit receives a signal from the hybrid coupler via the third port and returns an amplified signal back to the third port of the hybrid coupler. At least one of the auxiliary amplifier and negative resistance amplifier circuit selectively operates in combination with the main amplifier circuit.

Circuits and methods for using in parallel amplification and signal combining are described herein. A circuit uses a digitally controlled multistage cascade combiner, a digital phase and drive signal amplifier controller and a digital combiner controller circuit with N parallel signals with constant amplitudes belonging to an alphabet with M discrete values and discrete phases feeding it. The signals resulting from N power amplifiers (PAs) have also constant amplitudes belonging to an alphabet with N discrete values and discrete phases prior to being fed to the multistage combiner. A digital combiner controller circuit generates digital control information to activate, or deactivate, the outputs of the PAs, where a set of digital control signals generated in digital combiner controller are used to control sets of switches, where the signals can be activated at the combiner's inputs, according to their power and phase values. The digital control information ensures that only in-phase signals are combined in the active combiner stage and any difference among the inputs of the combiners is always minimized. Both digital combiner controller and digital drive signal amplifier controller, share information about the signals not to be fed to the multistage combiner, so that PAs drive signals can also be powered off under these circumstances. In provide high efficiency amplification the signal amplifiers employed before the combining stage may be of switched or current source type.

Embodiments of this application disclose a signal processing circuit, a radio frequency signal transmitter, and a communications device, and relate to the field of electronic device technologies, to improve power amplification efficiency of the signal processing circuit. The signal processing circuit includes: a splitter, a radio frequency signal converter, a first branch power amplifier, a second branch power amplifier, and a combiner. The splitter is connected to the radio frequency signal converter, the radio frequency signal converter is connected to the first branch power amplifier and the second branch power amplifier, and the first branch power amplifier and the second branch power amplifier are connected to the combiner.

Systems and apparatuses are disclosed that include an RF generator configured to generate RF signals having a wavelength. Amplifiers are configured to receive and amplify the RF signals from the RF generator and are separated from each other by a separation distance in a range between about 0.2 times the wavelength and about 10.0 times the wavelength. A power management system is configured to control one or more of the amplifiers based on information received that is associated with the RF signals.

An improved amplification of multiband signals for an uplink, in particular a satellite uplink is provided. For this purpose, multiple signals for separate frequency bands may be provided to a number of two or more uplink converters. The output of each uplink converter is amplified by a separate amplifier and the separately amplified signals are combined to obtain an amplified multiband uplink signal. In particular a waveguide combiner may be used for combining the amplified signals.

Circuits and methods for using in parallel amplification and signal combining are described herein. A circuit uses a digitally controlled multistage cascade combiner, a digital phase and drive signal amplifier controller and a digital combiner controller circuit with N parallel signals with constant amplitudes belonging to an alphabet with M discrete values and discrete phases feeding it. The signals resulting from N power amplifiers (PAs) have also constant amplitudes belonging to an alphabet with N discrete values and discrete phases prior to being fed to the multistage combiner. A digital combiner controller circuit generates digital control information to activate, or deactivate, the outputs of the PAs, where a set of digital control signals generated in digital combiner controller are used to control sets of switches, where the signals can be activated at the combiner's inputs, according to their power and phase values. The digital control information ensures that only in-phase signals are combined in the active combiner stage and any difference among the inputs of the combiners is always minimized. Both digital combiner controller and digital drive signal amplifier controller, share information about the signals not to be fed to the multistage combiner, so that PAs drive signals can also be powered off under these circumstances. In provide high efficiency amplification the signal amplifiers employed before the combining stage may be of switched or current source type.

A gallium arsenide (GaAs) radio frequency (RF) circuit is disclosed. The GaAs RF circuit includes a power amplifier and a low noise amplifier; a first transmit/receive (TR) switch, coupled to the power amplifier and the low noise amplifier, wherein the first TR switch is fabricated by a pHEMT (Pseudomorphic High Electron Mobility Transistor) process; and a first active phase shifter, coupled to the power amplifier or the low noise amplifier, wherein the first active phase shifter is fabricated by an HBT (Heterojunction Bipolar Transistor) process; wherein the GaAs RF circuit is formed within a GaAs die.

Load modulated Doherty power amplifiers are provided herein. In certain embodiments, a load modulated Doherty power amplifier includes a combiner, a carrier amplifier having an output coupled to a first terminal of the combiner, a peaking amplifier having an output coupled to a second terminal of the combiner, a load modulating amplifier having an output coupled to a third terminal of the combiner, and a radio frequency (RF) output port that is coupled to a fourth terminal of the combiner and provides an RF output signal. The peaking amplifier is operable to activate at a first power threshold, while the load modulating amplifier is operable to activate at a second power threshold to modulate down a load of the carrier amplifier and of the peaking amplifier.