A system includes a quantum processor includes a plurality of qubits. For each qubit, there is a circulator operative to receive a control signal and an output signal from the qubit. An isolator is coupled to an output of the circulator. A quantum-limited amplifier is coupled to an output of the isolator and configured to provide an output of the qubit. A multiplexor (MUX) is configured to frequency multiplex the outputs of at least two of the plurality of qubits as a single output of the quantum processor.

Described herein are load-modulated balanced amplifiers. An example load-modulated balanced amplifier can include a radio frequency (RF) input port, a RF output port, a peaking amplifier circuit operably coupled between the RF input and RF output ports, where the peaking amplifier circuit is a balanced amplifier that includes a pair of power amplifiers, and a carrier amplifier circuit operably coupled to the RF input port.

Described herein is a reconfigurable asymmetrical load-modulated balanced amplifier. The reconfigurable asymmetrical load-modulated balanced amplifier can include a radio frequency (RF) input port, an RF output port, a peaking amplifier circuit operably coupled between the RF input and RF output ports, where the peaking amplifier circuit is a balanced amplifier that comprises a pair of asymmetrical power amplifiers, and a carrier amplifier circuit operably coupled to the RF input port.

Switch circuits for electrical power are formed of a hybrid coupler configured to receive a signal as an input, and output first and second pulsed wave signals along first and second signal paths, respectively; in a plurality of time frames, wherein the phases of the first and second pulsed wave signals along first and second signal paths are aligned. The switch circuits may be incorporated in time folding power circuits as an exemplary application.

An average power tracking (APT) power amplifier apparatus is provided. In a non-limiting example, the APT power amplifier apparatus includes multiple sets of power amplifier circuits configured to amplify a radio frequency (RF) signal(s) for transmission in different polarizations (e.g., vertical and horizontal). In examples disclosed herein, the APT power amplifier apparatus can be configured to employ a single power management integrated circuit (PMIC) to provide an APT voltage to all of the power amplifier circuits for amplifying the RF signal(s). By employing a single PMIC in the APT power amplifier apparatus, it is possible to reduce footprint, power consumption, and costs of the APT power amplifier apparatus.

A radio frequency (RF) front end for wireless communications, in particular for use in a half duplex (HD) and/or full duplex (FD) transceiver. The RF front end is based on a quadrature balanced power amplifier (QBPA). The RF front end includes an antenna port for outputting a transmit signal to and receiving a receive signal from an antenna, and a receive port for outputting the receive signal to a signal processing section. Further, the QBPA is configured to receive a transmit input signal at a first port, receive a cancellation input signal at a fourth port, and receive the receive signal at a second port coupled to the antenna port.

Preventing RF signal distortion and signal error producing memory events in a Radio Frequency (RF) power amplifier (RFPA). An element, disposed prior to the Radio Frequency (RF) power amplifier (RFPA) in a signal path of a RF signal input to the RFPA, may enforce a maximum allowable amplitude in a high PAPR instantaneous high peak of the RF signal. An element may also increase or supplement a bias of the Radio Frequency (RF) power amplifier (RFPA) when a high PAPR instantaneous high peak is detected in the RF signal prior to receipt by the RFPA. Additionally, a first element operable detects when an instantaneous output voltage of the Radio Frequency (RF) power amplifier (RFPA) is below a predetermined voltage, and in response, a second element supplies additional current to prevent the output voltage of the RFPA from falling below a predetermined threshold voltage.

Embodiments of the disclosure generally relate to a multi-channel Doherty power amplifier, a multi-antenna transmitter, and a method for turning on the multi-channel Doherty amplifier. The multi-channel Doherty power amplifier includes: multiple input ports and the same number of output ports corresponding to multiple channels, the multiple channels having the same characteristics for radio signal amplification and transmission; multiple private peaking amplifiers corresponding to the multiple channels; and a common Doherty core shared by the multiple private peaking amplifiers. The multiple private peaking amplifiers and the common Doherty core are configured to amplify identical multi-channel signal for multiple inputs and multiple outputs, thus higher saving ratio and better channel performance (output power, linearity, efficiency, power gain etc.) consistency would be greatly improved.

A power amplifier having: a plurality of N amplifier modules, where N is an integer greater than one; an M:N power splitter having M inputs, where M is an integer less than N, and N outputs, each one of the N outputs being coupled to an input of a corresponding one of the plurality of N power amplifiers; a plurality of M delay lines, each one the M delay lines having an output coupled to a corresponding one of the M inputs of the M:N power splitter, each one of the plurality of M delay lines being coupled to a common input of the power amplifier.

A sequenced transmit muting wideband power amplifier is provided that includes at least one pre-driver stage having at least a first pre-driver and a second pre-driver. A mute switch selectively establishes a communication path between the first and second pre-drivers or couples the second pre-driver to a termination resistor. A pre-driver switch selectively activates/deactivates the first and second pre-drivers. A driver stage is in communication with the pre-driver stage and includes a first driver. A final amplifier stage is in communication with the driver stage and includes at least one second driver. At least one S-NBS switch is configured to selectively activate/deactivate the first driver and second driver. A controller is configured to activate the at least one pre-driver switch, the mute switch, the at least one S-NBS switch to selectively place the amplifier in one of a transmit mode and a mute mode.