An amplifier for a receiver circuit is disclosed. The amplifier has an input node (V.sub.in) and an output node (V.sub.out). It comprises a tunable tank circuit connected to the output node (V.sub.out), a feedback circuit path connected between the output node (V.sub.out) and the input node (V.sub.in), and a tunable capacitor connected between an internal node of the feedback circuit path and a reference-voltage node. A receiver circuit and a communication apparatus is disclosed as well.

A transistor circuit includes a transistor having a gate terminal and first and second conduction terminals, a first circuit configured to convert an AC input signal of the transistor circuit to a gate bias voltage and to apply the gate bias voltage to the gate terminal of the transistor, a second circuit configured to convert the AC input signal of the transistor circuit to a control voltage, and a switching circuit configured to apply a first voltage to the first conduction terminal of the transistor in response to the control voltage.

A power amplifier circuit is capable of restraining uneven temperature distribution among a plurality of unit transistors while restraining the deterioration of the characteristics of the power amplifier circuit. The power amplifier circuit includes: a first transistor group which includes a plurality of unit transistors and which amplifies an input signal and outputs an amplified signal; a bias circuit which supplies a bias current or a bias voltage to a base or a gate of each unit transistor of the first transistor group; a plurality of first resistive elements, each of which is connected between the base or the gate of each unit transistor of the first transistor group and an output of the bias circuit; and a plurality of second resistive elements, each of which is connected between an emitter or a source of each unit transistor of the first transistor group and a reference potential.

A power amplifier module includes first and second amplifiers, a first bias circuit, and an adjusting circuit. The first amplifier amplifies a first signal. The second amplifier amplifies a second signal based on an output signal from the first amplifier. The first bias circuit supplies a bias current to the first amplifier via a current path on the basis of a bias drive signal. The adjusting circuit includes an adjusting transistor having first, second, and third terminals. A first voltage based on a power supply voltage is supplied to the first terminal. A second voltage based on the bias drive signal is supplied to the second terminal. The third terminal is connected to the current path. The adjusting circuit adjusts the bias current on the basis of the power supply voltage supplied to the first amplifier.

A power amplifier apparatus, includes an envelope tracking (ET) current bias circuit configured to generate a first ET bias current by calculating a direct current DC, based on a reference voltage, and an ET current, based on an ET voltage, according to an envelope of an input signal; and a power amplifier circuit having a bipolar junction transistor supplied with the first ET bias current and a power voltage to amplify the input signal, wherein an average current of the first ET bias current is controlled to be substantially constant.

A buffer stage includes a control circuit. The control circuit includes a voltage generator, a voltage-to-current converter, and a current-to-voltage converter. The voltage generator is configured to generate a compensation voltage. The voltage-to-current converter is configured to convert the compensation voltage into a compensation current. The current-to-voltage converter is configured to convert the compensation current into a recovery compensation voltage. The recovery compensation voltage is arranged for modifying an output voltage of the buffer stage.

Base station antennas utilize RF transmitters and receivers, which operate with enhanced bias control to achieve very high speed switching during TDD operation. A radio frequency communication circuit for TDD includes a transmit/receive amplifier (e.g., MMIC) having first and second input terminals, which are responsive to a bias control voltage and radio frequency input signal. A bias control circuit is provided, which is electrically coupled to the first input terminal and a current receiving terminal of the transmit/receive amplifier. The bias control circuit includes a closed-loop feedback path between the current receiving terminal and the first input terminal, which is configured to regulate a magnitude of the bias control voltage with high precision to thereby achieve a substantially constant quiescent bias current at the current receiving terminal when the transmit/receive amplifier is enabled.

A transistor circuit includes a transistor having a gate terminal and first and second conduction terminals, a first circuit configured to convert an AC input signal of the transistor circuit to a gate bias voltage and to apply the gate bias voltage to the gate terminal of the transistor, a second circuit configured to convert the AC input signal of the transistor circuit to a control voltage, and a switching circuit configured to apply a first voltage to the first conduction terminal of the transistor in response to the control voltage.

In a general aspect, a circuit can include an amplifier circuit including a first amplifier, a first feedback path, and a second feedback path. The first feedback path can provide a feedback path from a positive output of the first amplifier to a negative input of the first amplifier. The second feedback path can provide a feedback path from a negative output of the first amplifier to a positive input of the first amplifier, The circuit can also include a loop circuit including a second amplifier, The loop circuit can be configured to provide a local feedback loop for the first amplifier and configured to control current flow into the positive input of the first amplifier and into the negative input of the first amplifier.

An amplifier circuitry includes a current source circuit, a voltage regulator circuit, and an amplifier. The current source circuit generates a first bias current. The voltage regulator circuit regulates a reference voltage to generate a supply voltage. The voltage regulator circuit includes a first and a second compensation resistors, the first and the second compensation resistors are configured to generate the reference voltage according to a reference a second bias currents, and a first ratio is present between the first and the second biasing currents. The amplifier includes first load resistors which are configured to generate a first common-mode output signal based on the supply voltage and the first bias current. The second ratio is present between the second compensation resistor and one of the first load resistors, and the first and the second ratios are arranged to compensate the first common-mode output signal.