A distribution amplifier for a communication device such as a gateway is provided. The distribution amplifier can receive an input signal and provide multiple output signals. The distribution amplifier can have a transmission line that receives the input signal and multiple amplifier stages that are connected to the transmission line to receive the input signal. The output of the amplifier stages correspond to the output signals from the distribution amplifier. The transmission line has equally spaced connection points for the amplifier stages. The transmission line can be designed to have an impedance that results in the impedance of the transmission line with the connected amplifier stages having a final impedance that matches the input impedance to the transmission line.

Provided is a high-gain amplifier based on double-gain boosting including a first gain amplification unit including a first amplifier, a second amplifier, and a an interstage matching network connected between the first amplifier and the second amplifier and performing primary amplification; and a second gain amplification unit connected in parallel with the first gain amplification unit and performing secondary boosting.

An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.

A multiple-path amplifier (e.g., a Doherty amplifier) includes first and second transistors (e.g., main and peaking transistors) with first and second output terminals, respectively, all of which is integrally-formed with a semiconductor die. A signal path through the second transistor extends in a direction from a control terminal of the second transistor to the second output terminal, where the second output terminal corresponds to or is closely electrically coupled to a combining node. The amplifier also includes an integrated phase delay circuit that is configured to apply an overall phase delay (e.g., 90 degrees) to a signal carried between the first and second output terminals. The integrated phase delay circuit includes delay circuit wirebonds coupled between the first and second output terminals, and the delay circuit wirebonds extend in a third direction that is angularly offset from (e.g., perpendicular to) the second direction.

Various embodiments relate to an integrated circuit including a transistor device having input and output terminals, and an inductor-capacitor (LC) circuit coupled to one of the terminals of the transistor device. The LC circuit includes a capacitor having a top plate and a bottom plate, a inductor having a coil structure, and a connector configured to couple the inductor and an interior portion the top plate of the capacitor. The inductor at least partially overlaps the capacitor.

An amplifier includes a package that includes a carrier amplifier having a carrier amplifier input and output, a peaking amplifier having a peaking amplifier input and output, and corresponding input and output leads. The package includes a first integrated passive device including a first capacitor structure. The first integrated passive device includes a first contact pad coupled to the peaking amplifier output and a second contact pad coupled to the peaking output lead. The package includes a second integrated passive device including a second capacitor structure. The second integrated passive device includes a third contact pad coupled to the carrier amplifier output and a fourth contact pad coupled to the carrier output lead. The amplifier includes input circuitry a combining node configured to combine a carrier output signal and a peaking output signal.

A power amplifier circuit is provided that includes a transmission circuit, a control circuit, a first terminal, and a second terminal. The transmission circuit includes an amplifier element that amplifies power of a radio frequency signal. The control circuit controls the transmission circuit. The first terminal receives a serial data signal that is based on a serial data standard. The second terminal receives a digital signal different from the serial data signal. The control circuit then controls the transmission circuit in response to the digital signal received from the second terminal.

A radio frequency (RF) amplifier and a bias circuit are provided. The RF amplifier includes an amplifier, a first inductive-capacitive resonance circuit, and a first bias circuit. The amplifier includes an input terminal configured to receive an incoming RF signal through a first RF path. The first inductive-capacitive resonance circuit includes a first terminal coupled to a first reference voltage. A second terminal of the first inductive-capacitive resonance circuit is coupled to the first RF path. In response to the first reference voltage being at a first reference level, the RF amplifier is enabled; in response to the first reference voltage being at a second reference level, the RF amplifier is disabled. The first bias circuit includes a first terminal configured to be coupled to the first reference voltage and a second terminal coupled to the input terminal of the amplifier to provide a first direct current (DC) component.

The present disclosure is to improve the power added efficiency of a power amplifier at high output power. The power amplifier includes: a first capacitor with a radio frequency signal input to one end thereof; a first transistor whose base is connected to the other end of the first capacitor to amplify the radio frequency signal; a bias circuit for supplying bias to the base of the first transistor; and a second capacitor with one end connected to the base of the first transistor and the other end connected to the emitter of the first transistor.

A receiver includes an amplification block supporting carrier aggregation (CA). The amplification block includes a first amplifier circuit configured to receive a radio frequency (RF) input signal at a block node from an outside source, amplify the RF input signal, and output the amplified RF input signal as a first RF output signal. The first amplifier circuit includes a first amplifier configured to receive the RF input signal through a first input node to amplify the RF input signal, and a first feedback circuit coupled between the first input node and a first internal amplification node of the first amplifier to provide feedback to the first amplifier.