H03F2200/249

PARALLEL CASCODE AMPLIFIER FOR ENHANCED LOW-POWER MODE EFFICIENCY
20240162865 · 2024-05-16 ·

In some embodiments, a power amplification system can comprise a current source, an input switch configured to alternatively feed current from the current source to a high-power circuit path and a low-power circuit path, and a band switch including a switch arm for switching between a plurality of bands. Each of the high-power circuit path and the low-power circuit path can be connected to the switch arm.

Standby voltage condition for fast RF amplifier bias recovery
11984852 · 2024-05-14 · ·

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit standby current during operation in the standby mode while allowing a quick recovery to normal operating conditions of the amplifier. Biasing an input transistor of the stacked transistors can be obtained by using a replica stack circuit.

Drain sharing split LNA
10381991 · 2019-08-13 · ·

A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g.sub.m of the input stage of the amplifier, thus improving the noise figure of the amplifier.

Drain Sharing Split LNA
20190245497 · 2019-08-08 ·

A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g.sub.m of the input stage of the amplifier, thus improving the noise figure of the amplifier.

Radio-frequency amplifier having active gain bypass circuit

Radio-frequency (RF) amplifier having active gain bypass circuit. In some embodiments, an amplifier can include a first amplification path implemented to amplify a signal, and having a cascode arrangement of a first input transistor and a cascode transistor to provide a first gain for the signal when in a first mode. The amplifier can further include a second amplification path implemented to provide a second gain for the signal while bypassing at least a portion of the first amplification path when in a second mode. The second amplification path can include a cascode arrangement of a second input transistor and the cascode transistor shared with the first amplification path. The amplifier can further include a switch configured to allow routing of the signal through the first amplification path in the first mode or the second amplification path in the second mode.

Amplifier device for high frequency signals

An amplifier device for high frequency signals, in particular a linear high frequency amplifier device, which comprises at least one input, an incoming line, a pre-distortion unit, in particular an adaptive pre-distortion unit, an amplifier unit, in particular a non-linear power amplifier unit, a transmission line, a feedback unit, and an output. The output is connected to the amplifier unit via the transmission line. In addition, the at least one input is connected to the pre-distortion unit such that two incoming branch lines are provided which are interconnected by a switching unit. A first incoming branch line of the incoming branch lines comprises a down-converter being arranged between the at least one input and the pre-distortion unit.

Conversion circuit and detection circuit

A conversion circuit for converting a current signal into a first output voltage signal, where the current signal flows through a sensing component, is provided. The conversion circuit includes: a first current eliminating circuit, configured to eliminate a first current in the current signal. The first current eliminating circuit includes: a current sample and hold circuit; and a current driving circuit, coupled between the sensing component and the current sample and hold circuit; a second current eliminating circuit, coupled to the sensing component and configured to eliminate a second current in the current signal; and an integrating circuit, coupled to the sensing component and configured to integrate a third current in the current signal, and output a first input voltage signal between a first integration output terminal and a second integration output terminal.

Standby Voltage Condition for Fast RF Amplifier Bias Recovery
20190190459 · 2019-06-20 ·

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit standby current during operation in the standby mode while allowing a quick recovery to normal operating conditions of the amplifier. Biasing an input transistor of the stacked transistors can be obtained by using a replica stack circuit.

Enhanced Reverse Isolation and Gain Using Feedback

An apparatus is disclosed for enhanced reverse isolation and gain using feedback. The apparatus includes an input node, an amplification node, a feedback node, an output circuit, at least one amplifier circuit, and a feedback circuit. The output circuit is connected between the amplification node and the feedback node. The at least one amplifier circuit is connected between the input node and the amplification node. The at least one amplifier circuit includes an input transistor and a cascode stage. The input transistor has a gate node and a drain node, and the gate node is connected to the input node. The cascode stage is connected between the drain node and the amplification node. The feedback circuit includes at least one feedback capacitor that is connected between the feedback node and the input node.

LNA with programmable linearity
10284151 · 2019-05-07 · ·

A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source input stage and a common gate output stage can be turned on or off using the gate of the output stage. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input stage of each cascode. Further switches used for switching degeneration inductors, gate/sources caps and gate to ground caps for each legs can be used to further improve the matching performance of the invention.