The present invention provides a wideband Doherty power amplifier comprising: a main power amplification device; an auxiliary power amplification device arranged in parallel with the main power amplification device; and a coupled phase compensation network configured for compensating a phase shift between the main power amplification device and the auxiliary power amplification device. The phase compensation network comprising a first transmission line section; a second transmission line section extending substantially collinearly with the first transmission line section; and two pairs of end-connected coupled transmission lines connected in parallel between the first transmission line section and the second transmission line section. The provided Doherty power amplifier demonstrated operation at 6 dB back-off between 1.3-2.3 GHz with efficiency in excess of 41%, which can be used in modern and future wireless communication systems which require power amplifiers operating over a wide frequency range.

The present disclosure relates to an amplifier arrangement comprising a first amplifier, a second amplifier and an output combiner arranged to combine respective output signals of the first amplifier and the second amplifier into an output signal of the amplifier arrangement. An amplifier arrangement input signal is arranged as input signal to the first amplifier, and a difference signal, representing a difference between the amplifier arrangement input signal and a scaled output signal of the first amplifier, is arranged as input to the second amplifier. The output combiner is arranged to modulate the loads of the first amplifier and the second amplifier in dependence of the output signal of the second amplifier.

A differential power amplifier includes an input matching network, a first-stage amplification circuit, a first inter-stage matching network, a second-stage amplification circuit, a second inter-stage matching network, a third-stage amplification circuit, and an output matching network. The first-stage amplification circuit and the second-stage amplification circuit are single-ended input single-ended output circuits. The third-stage amplification circuit is a dual input dual output circuit. The second inter-stage matching network includes a first transformer T1, a first capacitor C1, a second capacitor C2, a first inductor L1, and a second inductor L2. The output matching network includes a second transformer T2. The inter-stage matching networks and the output matching network are realized by the first transformer T1 and the second transformer T2, which reduces an inter-stage matching difficulty, optimizes input return loss and gain, and improves output power.

The present disclosure relates to a radar transmitting device, comprising a CMOS transceiver chip configured to provide at least one local oscillator signal at an output of the CMOS transceiver chip, and at least one BiCMOS transmitter chip coupled to the CMOS transceiver chip. The BiCMOS transmitter chip has an input for the local oscillator signal, at least one amplifier coupled to the input, a plurality of outputs for outputting a radar transmission signal on the basis of the local oscillator signal, and a plurality of transmission paths between the input and the plurality of outputs. Each of the transmission paths has a controllable analog phase shifter for controllable beam scanning during emission of the radar transmission signal. Additionally or alternatively, individual transmission paths of the BiCMOS transmitter chip can be selectively activated or deactivated using control signals.

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for a programmable input impedance circuit for a radio frequency (RF) low noise amplifier (LNA) including a high impedance mode circuit and a low impedance mode circuit. The high impedance mode circuit includes an inductor-degenerated transconductor transistor, an inductor selectively coupled between a source of the inductor-degenerated transconductor transistor and a ground, and a capacitor coupled between a gate of the inductor-degenerated transconductor transistor and the source of the inductor-degenerated transconductor transistor. The low impedance mode circuit includes a shunt resistor selectively coupled between an RF input source and an alternating current (AC) ground.

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for radio frequency (RF) low noise amplifier (LNA) circuit configured to receive an input RF signal from an RF input source and provide an amplified output RF signal, where the RF LNA circuit includes an amplifier circuit, where the amplifier circuit is configured to receive the input RF signal and provide the amplified output RF signal, and an inductor-degenerated transconductor input impedance circuit that is separate from the amplifier circuit and that is operatively coupled to the input of the amplifier circuit.

A microwave amplifier having a load network which provides more efficient amplification of a low power microwave frequency signal. The amplifier comprises a transistor and a load network coupled to the transistor output to shape a waveform of an amplified microwave signal at the transistor current source plane. The load network comprises: a fundamental matching network to provide impedance matching at a fundamental frequency; a half-wave transmission line for a second harmonic frequency disposed between the transistor output and the fundamental matching network; a quarter-wave stub and a five-quarter-wave stub for a third harmonic frequency arranged on the half-wave transmission line to provide an open circuit condition at the third harmonic; and a quarter-wave stub for the second harmonic frequency and a quarter-wave stub for the fundamental frequency, arranged on the half-wave transmission line to provide a short circuit condition at the second harmonic frequency.

A bandpass parametric amplifier circuit includes a plurality of unit cells. At least one unit cell includes a first inductor having a first node coupled to a center conductor and a second node coupled to ground. There is a first capacitor having a first node coupled to the center conductor and a second node coupled to ground. There is a second inductor having a first node coupled to the center conductor. A second capacitor has a first node coupled to a second node of the second inductor. The second capacitor and the second inductor are in series with the center conductor.

An RF power amplifier includes an amplifier device and a shunt-inductance circuit. The amplifier device includes a substrate, a combining node lead, first and second amplifier dies coupled to the substrate, and first and second output circuits. The first and second amplifier dies are configured to amplify first and second input RF signals, respectively, to produce first and second output RF signals at first and second output terminals, respectively. The first output circuit includes a first inductive path connecting the first output terminal to the lead. The second output circuit includes a second inductive path connecting the second output terminal to the lead. The lead is configured to combine the first and second output RF signals to produce a third output RF signal. The shunt-inductance circuit is coupled between the first output terminal and a ground reference.

A wireless repeater is disclosed. The wireless repeater can include a main booster with a first gain unit with a first adjustable gain and a second gain unit with a second adjustable gain. The wireless repeater can include a front end booster communicatively coupled to the main booster, with a coaxial cable coupled between the main booster and the front end booster. A test signal generator is configured to generate a direct current test signal or a radio frequency test signal to determine a signal loss of the coaxial cable. The wireless repeater can include a control unit to adjust one or more of the first adjustable gain or the second adjustable gain based on the determined signal loss of the coaxial cable.