Antenna waveguide transitions for solid state power amplifiers (SSPAs) are disclosed. An SSPA includes a waveguide channel that is configured to propagate an input signal, such as an electromagnetic signal, from an input port to a solid state amplifier for amplification. The waveguide channel is further configured to propagate an amplified signal from the solid state amplifier to an output port. Waveguide transitions to and from the solid state amplifier are bandwidth matched to the waveguide channel. Additionally, the waveguide transitions may be thermally coupled to the waveguide channel. The waveguide transitions may include antenna structures that have a signal conductor and a ground conductor. In this manner, the SSPA may have improved broadband coupling as well as improved thermal dissipation for heat generated by the solid state amplifier.

Antenna waveguide transitions for solid state power amplifiers (SSPAs) are disclosed. An SSPA includes a waveguide channel that is configured to propagate an input signal, such as an electromagnetic signal, from an input port to a solid state amplifier for amplification. The waveguide channel is further configured to propagate an amplified signal from the solid state amplifier to an output port. Waveguide transitions to and from the solid state amplifier are bandwidth matched to the waveguide channel. Additionally, the waveguide transitions may be thermally coupled to the waveguide channel. The waveguide transitions may include antenna structures that have a signal conductor and a ground conductor. In this manner, the SSPA may have improved broadband coupling as well as improved thermal dissipation for heat generated by the solid state amplifier.

A high frequency amplifier 1 includes an input terminal P.sub.IN, an output terminal P.sub.OUT, a transistor 5 configured to amplify an RF signal applied to the input terminal P.sub.IN, a matching circuit 9 for a fundamental of the RF signal and a reflection circuit 7 for a harmonic relative to the fundamental, the matching circuit 9 and the reflection circuit 7 being connected in series between the transistor 5 and the output terminal P.sub.OUT, an extraction circuit 13 configured to extract a harmonic appearing at the output terminal P.sub.OUT, processing circuits 15, 17 configured to adjust a phase and intensity of the harmonic extracted by the extraction circuit 13, and a multiplexing circuit 19 configured to multiplex the harmonic processed by the processing circuits 15, 17 to the harmonic reflected by the reflection circuit 7 and give the multiplexed harmonic to the transistor 5.

A MMIC support and cooling structure having a three-dimensional, thermally conductive support structure having a plurality of surfaces and a circuit having a plurality of heat generating electrical components disposed on a first portion of the surfaces and interconnected by microwave transmission lines disposed on a second portion of the plurality of surfaces of the thermally conductive support structure.

A coupler circuit includes: a signal line disposed between a first terminal and a second terminal; a coupling line disposed between a coupling port and an isolation port such that the coupling line is coupled to the signal line and is configured to extract a coupling signal from the signal line; and a coupling adjusting circuit connected to the coupling port and the isolation port, and configured to reduce changes in an amount of coupling according to a change in a frequency band of a signal passing through the signal line.

Provided is a harmonic suppression method, a corresponding low-noise amplifier (20, 30, 40), and a communication terminal. In the harmonic suppression method, an isolation unit (23, 33, 43) is arranged between a harmonic suppression unit (24, 34, 44) of the low-noise amplifier (20, 30, 40) and an output match network (25, 35, 45)/input match network (21, 31, 41). The harmonic suppression unit (24, 34, 44) is isolated from the output match network (25, 35, 45)/input match network (21, 31, 41) by means of the isolation unit (23, 33, 43), so that the two are not affected or compromised by each other, and can be designed separately. In this way, the design flexibility of a signal amplification circuit is greatly improved, and the design difficulty is reduced.

Included is a compensation circuit (9) having one end connected to another end of a first output circuit (7) and another end of a second output circuit (8) and another end grounded, the compensation circuit having an electrical length of 90 degrees at a first operation frequency and an electrical length of 45 degrees at a second operation frequency which is half of the first operation frequency.

A power amplifier may comprise: an element for amplifying an electrical signal received through an input terminal, and outputting the amplified electrical signal through an output terminal; a first impedance adjustment circuit connected to the input terminal of the element and adjusting impedance with respect to a frequency of a fundamental component at the input terminal; a second impedance adjustment circuit connected to the input terminal of the element and adjusting impedance with respect to a frequency of a multiplied harmonic component at the input terminal; a third impedance adjustment circuit connected to the output terminal of the element and adjusting impedance with respect to the frequency of the fundamental component at the output terminal; a fourth impedance adjustment circuit connected to the output terminal of the element and adjusting impedance with respect to the frequency of the multiplied harmonic component at the output terminal; a first frequency separation circuit which prevents an impedance change by the first impedance adjustment circuit with respect to the frequency of the multiplied harmonic component at the input terminal, and prevents an impedance change by the second impedance adjustment circuit with respect to the frequency of the fundamental component at the input terminal; and a second frequency separation circuit which prevents an impedance change by the third impedance adjustment circuit with respect to the frequency of the multiplied harmonic component at the output terminal, and prevents an impedance change by the fourth impedance adjustment circuit with respect to the frequency of the fundamental component at the output terminal.

According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.

A signal booster is disclosed that includes a first interface port, a second interface port, a third interface port, a downlink signal splitter device, an uplink signal splitter device, a main booster and a front-end booster. The uplink signal splitter device can include a first uplink splitter port configured to direct uplink signals from the second interface port towards the first interface port. The uplink signal splitter device can include a second uplink splitter port configured to direct uplink signals from the third interface port towards the first interface port. The main booster can include a main downlink amplification path and a main uplink amplification path. The front-end booster can include a front-end downlink amplification path and a front-end uplink amplification path.