Disclosed is a filter bank die that includes a first acoustic wave (AW) filter having a first antenna terminal coupled to the antenna port terminal and a first filter terminal, wherein the first AW filter is configured to have a filter skirt with a slope that spans at least a 100 MHz gap between adjacent passbands, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter.

Disclosed is a filter bank module having a substrate, an antenna port terminal, and a filter bank die. The filter bank die is fixed to the substrate and includes a first acoustic wave (AW) filter having a first antenna terminal coupled to the antenna port terminal and a first filter terminal, wherein the first AW filter is configured to pass a first passband and attenuate frequencies outside the first passband, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter, wherein the second AW filter is configured to pass a second passband that is spaced from the first passband to minimize interference between first bandpass and the second bandpass while attenuating frequencies outside the second passband.

Disclosed is a filter bank die having a first acoustic wave (AW) filter having a first antenna terminal and a first filter terminal, and a second AW filter having a second filter terminal, and a second antenna terminal coupled to the first antenna terminal to effectively diplex signals that pass through the first AW filter and the second AW filter.

A BAW resonance device comprises a first layer including a cavity located on a first side, a first electrode having a first end located in the cavity and a second end contacting with the first layer, a second layer located on the first side, and a second electrode located on the second layer above the cavity, wherein the first electrode and the second electrode are located on two sides of the second layer. The first electrode comprises a first electrode layer and a second electrode layer, and the second electrode layer and the second layer are located on two sides of the first electrode layer. The second electrode comprises a third electrode layer and a fourth electrode layer, and the second layer and the fourth electrode layer are located on two sides of the third electrode layer. Thus, the electrical resistance is lowered and the electrical losses are reduced.

There is provided a monolithic microwave integrated circuit, MMIC, front-end module (100) comprising: a gallium nitride structure (110) supported by a silicon substrate (120); a silicon-based transmit/receive switch (130) having a transmit mode and a receive mode; a transmit amplifier (112) configured to amplify an outgoing signal to be transmitted by said MMIC front-end module, wherein said transmit amplifier is electrically connected (132) to said transmit/receive switch, wherein said transmit amplifier comprises a gallium nitride high-electron-mobility transistor, HEMT, (114) formed in said gallium nitride structure; and a receive amplifier (113) configured to amplify an incoming signal received by said MMIC front-end module, wherein said receive amplifier is electrically connected (133) to said transmit/receive switch, wherein said receive amplifier comprises a gallium nitride HEMT (115) formed in said gallium nitride structure.

Examples of the disclosure include a wireless device comprising a power amplifier configured to output a balanced amplified signal, an antenna configured to transmit and receive signals, a balun coupled to the power amplifier and the antenna, and being configured to receive the balanced amplified signal and output, based on the balanced amplified signal, an unbalanced amplified signal to the antenna, and at least one capacitor coupled in series between the power amplifier and the balun.

Circuits and methods for a multi-gain mode amplifier, particularly an LNA, that achieves wideband output impedance matching and high gain while maintaining low power and a low NF in a highest gain mode, and which can switch to one or more lower gain modes that achieve higher linearity with lower power. In a highest gain mode, an inductor is selectively inserted between the amplified-signal terminal of an amplification core and an output LC output matching network. The inductor, when inserted, provides wideband output impedance matching, functioning as a series peaking inductor; accordingly, the inserted inductor delays current flow to the output capacitor and lowers the rise time of signal changes across the output capacitor. In addition, higher gain can be achieved compared to a conventional LC output impedance matching topology due to a higher impedance at the amplified-signal terminal of the amplification core.

A transmission filter is arranged in a first filter region and has one or more acoustic wave resonators, a plurality of terminal electrodes, and a plurality of wires. A reception filter is arranged in a second filter region and has one or more acoustic wave resonators, a plurality of terminal electrodes, and a plurality of wires. The first filter region and the second filter region are arranged adjacently to each other and have at least sides constituting a pair and opposing to each other. At least either one of the first filter region and the second filter region has no wire extending along one side in a forbidden region that is defined by a width including a terminal electrode nearest to the one side, along the one side and over the one side opposing to the other filter region.

A semiconductor device (1) according to the present disclosure includes: an n-channel depletion-mode transistor (10); an input matching circuit inside which the gate terminal (11) and the ground terminal (22) are DC-connected; a self-bias circuit (26) including a resistor (14) biasing the transistor (10) by a voltage drop due to a current flowing through the resistor (14), and a capacitor (15) connected in parallel to the resistor 14) and regarded as short-circuit at a frequency of the high-frequency power; and a diode (31) having an endmost anode connected to the source terminal (12) and an endmost cathode connected to the ground terminal (22), and connected in one stage or connected in series in a plurality of stages in the same direction.

A low noise amplifier topology can achieve very low noise figure by applying multiple magnetic coupling between gate matching inductors and source degeneration inductor of a field effect transistor. The resulting low noise amplifier has smaller inductors, which can have lower thermal noise contribution, and can maintain good gain and linearity performance. For example, a low noise amplifier includes a first inductor to receive an input; a second inductor coupled to the first inductor in series; a first field effect transistor device whose gate receives a signal from the second inductor; and a third inductor coupled to a source of the first field effect transistor device, where the third inductor is magnetically positively coupled to the first inductor and the second inductor.