An amplifier may include multiple stages, with the multiple stages arranged in a fan-out configuration. The fan-out configuration provides multiple amplified signals at multiple amplifier output nodes, which may be coupled to a shared set of downconverters. The shared downconverters may support processing of only a smaller bandwidth than the largest possible bandwidth of an input RF signal input to the amplifier. For example, the downconverters may support a bandwidth matching a smallest bandwidth of a supported RF signal. For example, when the amplifier is intended to support 5G mmWave RF signals and 5G sub-6 GHz RF signals, the downconverters may each individually support a bandwidth of carriers in the 5G sub-6 GHz RF signals but not individually support the entire bandwidth of a possible 5G mmWave RF signal.

In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.

Low noise amplifiers (LNAs) are disclosed herein. In certain embodiments, an LNA includes an input balun configured to convert a single-ended radio frequency (RF) receive signal to a differential RF receive signal, an amplifier chain configured to amplify the differential RF receive signal to generate a differential amplified RF receive signal, and an output balun configured to convert the differential amplified RF receive signal into a single-ended amplified RF receive signal. The LNA's amplifier chain is operable in multiple gain modes, and includes a first differential amplification stage, a second differential amplification stage, and a third differential amplification stage.

In one embodiment, an apparatus includes: a low noise amplifier (LNA) to receive and amplify a radio frequency (RF) signal, the LNA having a first controllable gain; a mixer to downconvert the RF signal to a second frequency signal; a programmable gain amplifier (PGA) coupled to the mixer to amplify the second frequency signal, the PGA having a second controllable gain; a digitizer to digitize the second frequency signal to a digitized signal; a demodulator coupled to the digitizer to demodulate the digitized signal; an automatic gain control (AGC) circuit to control one or more of the first controllable gain and the second controllable gain; and an AGC settling circuit to cause the demodulator to begin operation in response to determining that the AGC circuit has settled.

A radio frequency circuit includes: a first power amplifier capable of amplifying a first radio frequency signal and a second radio frequency signal each having a different frequency; and a second power amplifier capable of amplifying the second radio frequency signal. In a case where the first radio frequency signal and the second radio frequency signal are simultaneously transmitted, (i) under a condition that a sum of a bandwidth of the first radio frequency signal and a bandwidth of the second radio frequency signal is broader than or equal to a predetermined bandwidth, the first radio frequency signal is amplified by the first power amplifier, and the second radio frequency signal is amplified by the second power amplifier, and (ii) under a condition that the sum is narrower than the predetermined bandwidth, the first radio frequency signal and the second radio frequency signal are amplified by the first power amplifier.

A radio frequency module includes: a module board including first and second principal surfaces; first and second power amplifiers on the first principal surface; external-connection terminals on the second principal surface; and first and second via conductors connecting the first and second principal surfaces. The first and second via conductors are spaced apart in the module board, one end of the first via conductor is connected to a first ground electrode of the first power amplifier, the other end of the first via conductor is connected to a first external-connection terminal, one end of the second via conductor is connected to a second ground electrode of the second power amplifier, the other end of the second via conductor is connected to a second external-connection terminal, and the first and second via conductors each penetrate through the module board in a direction normal to the first and second principal surfaces.

A front-end module may include an acoustic wave filter with a first and second interdigital transducer electrode. The first interdigital transducer electrode may be single-ended with a first input bus bar that receives an input signal and a second input bus bar connected to ground. The second interdigital transducer electrode may be differential with a first output bus bar connected to a first output terminal and a second output bus bar connected to a second output terminal. The front-end module may include a low noise amplifier (LNA) that outputs a differential signal via a differential output and has a differential input connected to the acoustic wave filter. The LNA may include a first input transistor that receives a first signal from the first output terminal of the acoustic wave filter and a second input transistor that receives a second signal from the second output terminal of the acoustic wave filter.

A radio-frequency module includes an integrated circuit (IC) device and an external inductor provided outside the IC device. The IC device includes a plurality of low-noise amplifiers, one or more inductors, and a switching circuit. The plurality of low-noise amplifiers includes a plurality of transistors in one to one correspondence. The one or more inductors are coupled to one or more of the plurality of transistors. Each inductor is coupled to the emitter or source of a corresponding one of the plurality of transistors. The switching circuit is coupled between the emitter or source of each of the plurality of transistors and the external inductor. The external inductor is coupled between the switching circuit and ground in series with each of the one or more inductors via the switching circuit.

Aspects of the disclosure include a wireless device comprising a module input to receive an input signal, a module output to provide an amplified output signal, a low-noise amplifier including an input amplification stage coupled to the input, and a plurality of output amplification stages switchably coupled to the input amplification stage, and a plurality of impedance-matching circuits, each impedance-matching circuit of the plurality of impedance-matching circuits having an input coupled to a respective output amplification stage and an output coupled to the module output.

Circuits and methods for improving the noise figure (NF) of an amplifier, particularly an LNA, in high-gain modes while improving the IIP3 of the amplifier in low-gain modes. The source of an amplifier common-source FET is coupled to circuit ground thorough a degeneration circuit comprising a two-port inductor and a bypass switch coupled in parallel with the inductor. A switched feedback circuit is coupled between the gate of the common-source FET and a feedback node in the amplifier output signal path. During a low gain mode, the inductor is entirely bypassed and the enabled feedback circuit lowers the input impedance of the common-source FET and reduces the gain of the amplifier circuit, essentially eliminating the need for a degeneration inductor. During a high gain mode, the source of the common-source FET is coupled to circuit ground through the inductor and the feedback circuit is disabled. Other gain modes are supported.