A power amplifying device includes a first amplification circuit amplifying a first signal having a first frequency component and a second frequency component; a second amplification circuit amplifying a second signal received through an output node of the first amplification circuit; a filter circuit connected between a ground node of the first amplification circuit and a common ground to pass the first and second frequency components to the common ground through the ground node; and an inverting circuit that phase-inverts a signal including second harmonic components of the first and second frequency components that are received through the ground node of the first amplification circuit and provide the phase inverted signal to the output node of the first amplification circuit.

Apparatus and methods for biasing of power amplifiers are disclosed. In one embodiment, a mobile device includes a transceiver that generates a radio frequency signal and a power amplifier enable signal, a power amplifier that provides amplification to the radio frequency signal and that is biased by a bias signal, and a bias circuit that receives the power amplifier enable signal and generates the bias signal. The bias circuit includes a gain correction circuit that generates a correction current in response to activation of the power amplifier enable signal, and a primary biasing circuit that generates the bias signal based on the correction current and the power amplifier enable signal.

A system for time aligning widely frequency spaced signals includes a digital predistortion (DPD) processor and a power amplifier coupled to the DPD processor and operable to provide a transmit signal at a power amplifier output. The system also includes a feedback loop coupled to the power amplifier output. The feedback loop comprises an adaptive fractional delay filter, a delay estimator coupled to the adaptive fractional delay filter, and a DPD coefficient estimator coupled to the delay estimator.

An apparatus for shifting a digital signal having a first sample rate by a shift time to provide a shifted signal having a second sample rate is provided. The apparatus includes a sample rate converter configured to provide a value of an interpolated signal at a compensated sample time as a sample of the shifted signal, the interpolated signal being based on the digital signal. The sample rate converter is configured to modify a time interval between a sample time of the digital signal and the compensated sample time based on the shift time.

Apparatus and methods for quadrature combined Doherty amplifiers are provided herein. In certain embodiments, a separator is used to separate a radio frequency (RF) input signal into a plurality of input signal components that are amplified by a pair of Doherty amplifiers operating in quadrature. Additionally, a combiner is used to combine a plurality of output signal components generated by the pair of Doherty amplifiers, thereby generating an RF output signal exhibiting quadrature balancing.

Apparatus and methods for power amplifiers that can operate under a wide range of supply voltages are disclosed herein. In certain implementations, a method of adjusting a parameter of a power amplifier is provided. The method includes detecting a value of a supply voltage provided to the power amplifier. The method further includes selecting a first value from a plurality of values for a first parameter of the power amplifier based on the detected value of the supply voltage. The method further includes adjusting the first parameter of the power amplifier to the first value.

Aspects of this disclosure relate to compensating for dynamic error vector magnitude. A compensation circuit can generate a compensation signal based at least partly on an amount of time that an amplifier, such as a power amplifier, is turned off between successive transmission bursts of the amplifier. For example, the compensation circuit can charge a capacitor based at least partly on an amount of time that the amplifier is turned off between successive transmission bursts and generate the compensation signal based at least partly on an amount of charge stored on the capacitor. A bias circuit can receive the compensation signal, generate a bias signal based at least partly on the compensation signal, and provide the bias signal to the amplifier to bias the amplifier.

A radio frequency front-end circuit performs, in a communication band made up of a plurality of communication channels within a particular frequency band used in a system, wireless communication through a use channel selected from among empty communication channels in the plurality of communication channels, the radio frequency front-end circuit including a transmission-side amplifier circuit and a transmission circuit both serving as a transmission-side circuit that produces, from a transmitted signal after being subjected to a predistortion process, a transmitted signal corresponding to the use channel, and a frequency variable filter serving as a tunable filter that attenuates a radio frequency signal of a spurious wave at least in an alternate adjacent channel relative to the use channel.

An N-path filter with one or more branches selectively coupled to a shared circuit node includes a first branch having a first feedback path and a second feedback path. The first feedback path includes a Miller amplifier having an input coupled to an input voltage and a first capacitor coupled to both the input voltage and an output of the Miller amplifier. The second feedback path includes a node in common with the first feedback path. The second feedback path also includes a first high pass filter coupled to the output of the Miller amplifier and a second capacitor coupled to both the first capacitor and the first high pass filter.

There are provided: a table memory to store a relation between a control code and gains of variable gain amplifiers; a gain controller to apply the gains to the variable gain amplifiers; an amplitude phase detector to detect amplitude and a phase from an output signal of the vector sum phase shifter; an amplitude phase recorder to record, when the gains are applied by the gain controller, a combination of a control code corresponding to said gains and the amplitude and the phase detected by the detector; and a table calibrator to find a phase shift characteristic of a vector summed part from records of the amplitude phase recorder and calibrate the relation between a control code and gains recorded in the table memory by using the phase shift characteristic.