An envelope tracking (ET) power amplifier apparatus is provided. The ET power amplifier apparatus includes a pair of power amplifiers configured to amplify a pair of radio frequency (RF) signals based on a pair of ET voltages. In one aspect, each of the RF signals is split before amplification and recombined after amplification. As such, the power amplifiers can operate based on half the peak power of the RF signals to help improve operating efficiency of the power amplifiers. In another aspect, the RF signals are pre-processed prior to amplification to form a pair of composite RF signals with similar average power such that the power amplifiers can operate based on substantially similar ET voltages. As a result, it may be possible to employ a single ET integrated circuit (ETIC) to provide the ET voltages, thus helping to reduce cost and footprint of the ET power amplifier apparatus.

Methods and systems for power amplification with digital quantized power supply with multiple amplifiers are disclosed herein. In one embodiment, In one embodiment, a time-varying envelope signal is sampled, quantized and decomposed into several constituent signals that are individually amplified, and then combined to form a desired amplified version of the quantized time-varying envelope. Amplitude, phase and/or frequency characteristics of one or more of the signals and supply voltages V.sub.dd and source current of one or more amplifiers are digital controlled based on the information provided by quantization process and slow and fast power control information. Amplitude, phase and/or frequency characteristics of one or more of the constituent signals to be amplified are controlled to provide the desired amplitude, phase, frequency, and/or spectral characteristics of the desired quantized version of the time-varying envelope signal.

A power amplifier includes an in-phase modulator configured to modulate an in-phase component of an input signal, a quadrature modulator configured to modulate a quadrature component of the input signal, and a processor configured to process the in-phase and quadrature components. The processor includes a clock configured to produce a clock signal, a pulse processor configured to remove non-essential information from the modulated in-phase and quadrature components, and a pulse converter configured to select an amplifier class and output a control signal based on the selected amplifier class. A switching network is also included and configured to actuate one or more switches based on the control signal to output an amplified signal.

An electronic circuit and method are provided. The electronic circuit includes an in-phase(I)-quadrature(Q) amplifier including an I cascode branch and a Q cascode branch, the IQ amplifier configured to receive a differential input and control signals, control, based on the control signals, gate voltages in the I cascode branch and gate voltages in the Q cascode branch, generate an I output signal with the I cascode branch, and generate a Q output signal with the Q cascode branch, and a quadrature coupler configured to perform quadrature summation of the I output signal and the Q output signal and generate a final phase shifted output.

Embodiments disclosed herein relate to improving a power output of a transmitter of an electronic device. To do so, the transmitter may include signal selection circuitry to adjust a sign selection signal to accurately transition between polarities of a quadrature (e.g., I or Q) component signal stored in or for which an indication is stored in a storage cell of a radio frequency digital-to-analog converter. The sign selection signal may generate a separate adjusted sign selection signal for each polarity of each quadrature component signal such that a transition of the selection signal between a first value and a second value (e.g., logic high and low) occurs when the respective quadrature (e.g., +/− and I/Q component signal is a logic low. In this way, the signal selection circuitry reduces an error pulse in the output of the transmitter.

According to an aspect, there is provided a method for power-amplification of a transmission signal, comprising: obtaining the transmission signal with phase and amplitude modulation; generating a power-amplified polar signal for approximating a power-amplified transmission signal by power-amplifying a first constant-envelope signal with one of two or more first amplification factors based on the transmission signal; generating an outphasing pair of a first power-amplified outphasing signal and a second power-amplified outphasing signal based on the transmission signal; and combining the power-amplified polar signal, the first power-amplified outphasing signal and the second power-amplified outphasing signal to provide the power-amplified transmission signal.

Techniques for generating a power tracking supply voltage for a circuit (e.g., a power amplifier) are disclosed. The circuit may process multiple transmit signals being sent simultaneously on multiple carriers at different frequencies. In one exemplary design, an apparatus includes a power tracker and a power supply generator. The power tracker determines a power tracking signal based on inphase (I) and quadrature (Q) components of a plurality of transmit signals being sent simultaneously. The power supply generator generates a power supply voltage based on the power tracking signal. The apparatus may further include a power amplifier (PA) that amplifies a modulated radio frequency (RF) signal based on the power supply voltage and provides an output RF signal.

According to one embodiment, a transformer-based in-phase and quadrature (IQ) includes a differential balun having a first inductor and a second inductor. The first inductor has a first input terminal and a first output terminal. The second inductor has a second input terminal and a second output terminal. Additionally, the IQ generator circuit includes a third inductor magnetically coupled with the first inductor. The third inductor has a first isolation terminal and a third output terminal. The IQ generator circuit also includes a fourth inductor magnetically coupled with the second inductor. The fourth inductor has a second isolation terminal and a fourth output terminal. The IQ generator circuit additionally includes a first transistor coupled to the first input terminal of the first inductor. Further, the generator circuit includes a second transistor coupled to the second input terminal of the second inductor. The first transistor, the second transistor, the first inductor, and the second inductor form a part of a differential amplifier.

Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal and a bias control circuit that biases the power amplifier. The power amplifier includes an amplification transistor that receives the RF signal at an input, and a first bias network and a second bias network each connected to the input. The bias control circuit includes a first switch, a first reference current source that provides the first reference current to the first bias network through the first switch, a second switch, and a second reference current source that provides the second reference current to the second bias network through the second switch.

In some embodiments, an amplifier system can include an amplifier circuit having first and second amplifiers configured to amplify respective first and second portions of an input signal. Each of the first and second amplifiers can include a cascode stage with input and output transistors arranged in a cascode configuration. The amplifier system can further include an envelope tracking bias circuit coupled to the amplifier circuit and configured to provide a bias signal to the output transistor of the cascode stage of at least one of the first and second amplifiers. The amplifier system can further include a supply circuit configured to provide a non-envelope tracking supply voltage to the output transistor of the cascode stage of the at least one of the first and second amplifiers.