According to one embodiment, a clipping state detecting circuit includes: a zero-cross detection circuit that detects a zero-cross point of an input signal; an output circuit that converts the input signal into a PWM signal; a clip detection circuit that detects a state in which an output of the output circuit is clipped; and a control circuit that determines a state is a clipping state when a clip time of the output of the output circuit satisfies a condition of a threshold value set in advance with respect to a non-clip time.

According to one embodiment, a class-D amplifier including: a PWM modulator that outputs a PWM modulation signal in response to an input signal; and a drive circuit that amplifies the PWM modulation signal, and supplies it to an output end. The drive circuit includes: a first output transistor whose main current path is connected between a power source supplying end and the output end; a second output transistor having a size larger than a size of the first output transistor; and a resistance element that is connected between the main current path of the first output transistor and the output end.

A sense amplifier circuit comprising a first-, second-, third- and fourth-amplification-blocks, each amplification-block comprising: an amplification-block-transistor comprising and an amplification-block-resistor. The amplification-block-transistor includes: a first-conduction-channel-terminal, a second-conduction-channel-terminal that is connected to an amplification-block-output-node, and a control-terminal that is connected to an amplification-block-control-node. The sense amplifier circuit also comprises: an amplification-block-resistor connected in series between an amplification-block-input-node and the first-conduction-channel-terminal; a first-bias-voltage-source connected to the amplification-block-control-nodes of the first- and third-amplification-blocks, a second-bias-voltage-source connected to the amplification-block-control-nodes of the second- and fourth-amplification-blocks. The sense amplifier circuit also comprises: a first-common-mode-voltage-resistor connected in series between a first-sensed-output-terminal and a common-mode-voltage-node; and a second-common-mode-voltage-resistor connected in series between a second- sensed-output-terminal and the common-mode-voltage-node.

An error amplifier includes an output pin coupled to a pulse width modulation (PWM) comparator of a buck-boost converter. A first transconductance amplifier adjusts an output current at the output pin and operates in a constant voltage mode. The first transconductance amplifier includes a first positive input to receive a first voltage reference and a first negative input coupled to a tap point of a voltage divider coupled between a voltage bus and a ground of the buck-boost converter. A second transconductance amplifier also adjusts the output current at the output pin and operates in a constant current mode. The second transconductance amplifier includes a second positive input to receive a second voltage reference and a second negative input coupled to a current sense amplifier, the current sense amplifier being coupled to a sense resistor positioned inline along the voltage bus.

An IC controller for USB Type-C device includes an error amplifier (EA), which includes an EA output coupled to a PWM comparator of a buck-boost converter; a first transconductance amplifier to adjust a current at the EA output, the first transconductance amplifier operating in a constant voltage mode; and a second transconductance amplifier to adjust the current at the EA output, the second transconductance amplifier operating in a constant current mode. A first set of programmable registers is to store a first set of increasingly higher transconductance values. A second set of programmable registers is to store a second set of increasingly higher transconductance values. Control logic is to: cause the first transconductance amplifier to operate while sequentially using transconductance values stored in the first set of programmable registers; and cause the second transconductance amplifier to operate while sequentially using transconductance values stored in the second set of programmable registers.

A class-D amplifier with multiple “nested” levels of feedback. The class-D amplifier surrounds an inner feedback loop, which takes the output of a switching amplifier and corrects for errors generated across the switching amplifier, with additional feedback loops that also take the output of the switching amplifier.

The disclosure presents a method and an amplifier system for minimizing variation in an acoustical signal caused by variation in gain of an amplifier, comprising a battery for providing a supply voltage to the amplifier, a digital signal processor for providing the acoustical signal to the amplifier, a controller unit receiving an enablement signal when the supply voltage is in an offset mode, and based on the enablement signal requesting a measured voltage during a time period, and a first analog-to-digital converter configured for measuring the supply voltage to the amplifier when receiving the request from the controller unit or the first analog-to-digital converter is configured for measuring the supply voltage to the amplifier continuously, and where variations in the measured voltage relates to variations in the supply voltage during the time period. Furthermore, the controller unit is configured to predict offset modes (i.e. changes) in the supply voltage based on the enablement signals and a fitting of the measured voltages, and wherein the controller unit is configured to generate a compensating signal based on the fitting and transmit the compensating signal to the digital signal processor, the digital signal processor is then configured to minimize variation in the acoustical signal at the output of the amplifier by compensating the variation in gain of the amplifier based on the compensating signal.

Example embodiments provide a device that includes a power transformer with a first output voltage terminal providing a first voltage and a second output voltage terminal providing a second voltage, a voltage regulator coupled to one or more of the first output voltage terminal and the second output voltage terminal, and a power storage element that stores power supplied by the second output voltage, and the first output voltage terminal supplies power to a remote entity until a load power requirement of the remote entity exceeds a threshold power level at which time the power storage element is used to provide power from the second output voltage terminal to the remote entity.

An amplifier for headphones including a current digital-to-analog converter (DAC) configured to output a current based on a digital audio input signal, an output electrically connected to a speaker and configured to output an output signal to the speaker, and a pulse width modulation (PWM) loop configured to receive an error signal, the error signal based on a difference between the current from the current DAC and a current of the output signal, and generate the output signal based on the error signal. The PWM loop includes an analog-to-digital converter (ADC) configured to receive an analog signal based on the current from the current DAC and output a digital signal representing the analog signal, and an encoder configured to receive the digital signal and output a pulse having a width based on the analog signal.

The disclosure presents a method and an amplifier system for minimizing variation in an acoustical signal caused by variation in gain of an amplifier, comprising a battery for providing a supply voltage to the amplifier, a digital signal processor for providing the acoustical signal to the amplifier, a controller unit receiving an enablement signal when the supply voltage is in an offset mode, and based on the enablement signal requesting a measured voltage during a time period, and a first analog-to-digital converter configured for measuring the supply voltage to the amplifier when receiving the request from the controller unit or the first analog-to-digital converter is configured for measuring the supply voltage to the amplifier continuously, and where variations in the measured voltage relates to variations in the supply voltage during the time period. Furthermore, the controller unit is configured to predict offset modes (i.e. changes) in the supply voltage based on the enablement signals and a fitting of the measured voltages, and wherein the controller unit is configured to generate a compensating signal based on the fitting and transmit the compensating signal to the digital signal processor, the digital signal processor is then configured to minimize variation in the acoustical signal at the output of the amplifier by compensating the variation in gain of the amplifier based on the compensating signal.