A device and method for amplifying signals is provided. The device can have an input to receive an input signal having a first desired signal on a first carrier, a second desired signal on a second carrier, and one or more interfering signals. The device can have a first carrier aggregation (CA) chain for use with the first desired signal and a second CA chain for use with the second desired signal. The first and second CA chains can be coupled to the input. The first and second CA chains can have a plurality of transconductance stages. Each of the transconductance stages can be configured as a high impedance stage or a low impedance stage. The transconductance stages can be selectively activated to incrementally adjust the transconductance, and therefore the input impedance, of each of the CA chains.

A regulator amplifier circuit of an embodiment includes a differential amplifier circuit, an nMOS transistor, and a pMOS transistor. The differential amplifier circuit includes a differential circuit and a transistor. The differential circuit includes a differential MOS transistor circuit, and the transistor includes a gate voltage controlled by the differential circuit. The nMOS transistor includes a drain connected to a drain on minus side of the differential MOS transistor, and a gate connected to a source of the transistor. The nMOS transistor operates in a weak inversion region. The pMOS transistor includes a source connected to a source of the nMOS transistor, and a drain connected to a voltage lower than a source voltage of the nMOS transistor. The pMOS transistor operates in the weak inversion region.

A regulator amplifier circuit of an embodiment includes a differential amplifier circuit, an nMOS transistor, and a pMOS transistor. The differential amplifier circuit includes a differential circuit and a transistor. The differential circuit includes a differential MOS transistor circuit, and the transistor includes a gate voltage controlled by the differential circuit. The nMOS transistor includes a drain connected to a drain on minus side of the differential MOS transistor, and a gate connected to a source of the transistor. The nMOS transistor operates in a weak inversion region. The pMOS transistor includes a source connected to a source of the AMOS transistor, and a drain connected to a voltage lower than a source voltage of the nMOS transistor. The pMOS transistor operates in the weak inversion region.

Low noise amplifiers (LNAs) are disclosed. In one aspect, an LNA may have distortion cancellation that is orthogonally implemented relative to noise cancellation such that changes to the distortion cancellation do not affect the noise cancellation. In further exemplary aspects, cancellation circuitry is added in parallel to a main or primary LNA path. The cancellation circuitry may include an initial impedance matching amplifier that effectuates noise cancellation and a second amplifier that effectuates distortion cancellation. Variations in the placement and composition of the second amplifier are provided. By providing a second path that allows for independent control of noise and distortion cancellation, overall performance of the LNA is improved.