This disclosure relates generally to Doherty amplifiers. In one embodiment, a Doherty amplifier includes an RF input of the Doherty amplifier for receiving a radio frequency (RF) signal, a main amplifier coupled to the RF input, and an auxiliary amplifier coupled to the RF input. A phase lag component connected between the RF input and one of either the main amplifier or the auxiliary amplifier and a phase lead component connected between the RF input and another one of either the main amplifier or the auxiliary amplifier. In some embodiments, the phase lead and phase lag components ensure that the split signals output from the main and auxiliary amplifier are recombined in phase throughout a frequency band.

This disclosure provides methods, devices, and systems for operational amplifier frequency compensation. The present implementations more specifically relate to techniques for dynamically calibrating the capacitance of a compensation capacitor based on the frequency at which an operational amplifier oscillates. In some aspects, an operational amplifier may include a differential input stage, a high gain stage, and a frequency compensation controller configured to operate the operational amplifier in a normal mode or a calibration mode. Compensation capacitors are switchably coupled between the outputs of the differential input stage and the outputs of the high gain stage based on the operating mode of the operational amplifier. More specifically, in the calibration mode, the coupling of the capacitors causes an output voltage of the op amp to oscillate relative to an input voltage. By contrast, in the normal mode, the coupling of the capacitors causes the output voltage to track the input voltage.

An amplifier includes a first stage and a second stage. The first stage includes a first output and a second output. The second stage includes an output, a first transistor and a second transistor. The first transistor includes a drain coupled to the first output of the first stage, and a source coupled to the output of the second stage. The second transistor includes a drain coupled to the second output of the first stage, and a gate coupled to the output of the second stage.

A pulse signal compensation circuit of a pulse generator can include a pulse measurement circuit and a compensation generator circuit. The pulse measurement circuit can be configured to receive a plurality of pulse signals and to generate an average duty cycle or pulse overlap signal proportional to the duty cycle or pulse overlap of the plurality of pulses. The compensation generator circuit can be configured to receive the average duty cycle or pulse overlap signal and generate a duty cycle or pulse overlap compensation signal based on the average duty cycle or pulse overlap signal. The compensation signal can be utilized to adjust the duty cycle, amount of positive or negative pulse width overlap, and or the like of the plurality of pulse signals.

Amplifier devices includes a first amplifier connected to receive an input voltage. The first amplifier outputs an internal voltage. These structures also include a second amplifier having an input node connected to receive the internal voltage and an output node outputting an output voltage. A resistive feedback loop is connected to the input node and the output node of the second amplifier. A first cross-coupled bandwidth boosting stage is connected to the input node of the second amplifier and a second cross-coupled bandwidth boosting stage connected to the output node of the second amplifier. The cross-coupled bandwidth boosting stages form a distributed differential positive feedback structure.

The present invention breaks up the frequency bands which can be filtered by a simple low-loss band-pass or low pass filter. The second harmonic frequency is reduced by use of a non-linear clipper element which controls the driving waveform symmetry and can reduce the harmonics by as much as 5-15 db which makes the filter much simpler and allows the amplifier to remain wide-band. The output waveform from the amplifier is symmetrical or nearly symmetrical.

An amplifier includes an output stage circuit and a compensation circuit. The output stage circuit includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The compensation circuit includes a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The first capacitor is coupled between the first input terminal and the second output terminal, and is configured to operate as a first Miller capacitor. The second capacitor is coupled between the second input terminal and the first output terminal, and is configured to operate as a second Miller capacitor. The third capacitor and the fourth capacitor are configured to alternately operate as the first Miller capacitor and the second Miller capacitor according to at least one clock signal.

An amplifier circuit (AC) for amplifying an output signal (OS) of a capacitive sensor (M) comprises a first input terminal (AIN) to receive the output signal (OS) of the capacitive sensor (M) and a second input terminal (BIN) to receive a bias voltage (Vbias) of the capacitive sensor (M). The amplifier circuit (AC) comprises an amplifier (A) for amplifying the output signal (OS) and a control circuit (CF) arranged in a feedback loop (FL) of the amplifier (A) being configured to control a DC voltage level at an input connection (A1) of the amplifier (A). A bias voltage sensing circuit (BVS) senses a change of the level of the bias voltage (Vbias) at the second input terminal (BIN) and changes the bandwidth of the feedback loop (FL) in dependence on the sensed change of the level of the bias voltage (Vbias).

An I-V conversion module includes: a current output type sensor, a pre-integral circuit, a charge transfer auxiliary circuit, and an I-V transformation circuit including an inverting amplifier. The current output type sensor is connected to an input end of the I-V transformation circuit through the pre-integral circuit. The charge transfer auxiliary circuit connects in parallel with the inverting amplifier. When both the pre-integral circuit and the charge transfer auxiliary circuit are open circuits, the pre-integral circuit pre-integrates the induction current output by the current output type sensor to store pre-integral charges. When both pre-integral circuit and the charge transfer auxiliary circuit are closed circuits, the pre-integral charges are transferred to the I-V transformation circuit. In these embodiments, both the time for establishing the I-V conversion module and power consumption can be reduced.

An apparatus and method for using the known phenomena of quantum gate tunneling in semiconductor transistors to define the DC state of a charge-coupled amplifier is described. A first stage in which the tunneling current is bipolar (by pairing PMOS and NMOS transistors) in combination with a second stage with a controlled common mode voltage that can be used to control the first stage tunneling current, and thus the common mode voltage at the input. This can be done without the use of additional elements that may degrade performance or power consumption, since the input devices both process the input signal and maintain the DC operating point of the circuit. The approach may be advantageously used not only in charge-coupled amplifiers as described herein, but also in other capacitively coupled circuits such as charge balancing analog to digital converters (ADCs) and digital to analog converters (DACs).