An operational amplifier 1 comprises transistors Q1 and Q2 forming an input stage, and input resistors R1 and R2 which form a filter together with parasitic capacitors C1 and C2 accompanying the transistors Q1 and Q2. Resistance values R of the resistors R1 and R2 may be set to R=1/(2π.Math.fc.Math.C), where C is the capacitance value of each of the parasitic capacitors C1 and C2, and fc is the target cutoff frequency of the filter. The operational amplifier 1 may also include a power supply resistor R0 which forms a filter together with a parasitic capacitor C0 accompanying a power supply line.

A receiver front-end circuit and an operating method thereof are disclosed. The receiver front-end circuit includes a common-mode suppression circuit and a rear-stage circuit. The common-mode suppression circuit is used to receive an external input common-mode voltage signal and perform common-mode noise suppression processing on the external input common-mode voltage signal, and then output an internal input common-mode voltage signal. The rear-stage circuit is coupled to the common-mode suppression circuit and used to receive the internal input common-mode voltage signal. The dynamic swing of the internal input common-mode voltage signal is smaller than the dynamic swing of the external input common-mode voltage signal.

Chopper amplifiers with multiple sensing points for correcting input offset are disclosed herein. In certain embodiments, a chopper amplifier includes chopper amplifier circuitry including an input chopping circuit, an amplification circuit, and an output chopping circuit electrically connected in a cascade along a signal path. The chopper amplifier further incudes a multi-point sensed offset correction circuit that generates an input offset compensation signal based on sensing a signal level of the signal path at multiple signal points. Furthermore, the multi-point sensed offset correction circuit injects the input offset compensation signal into the signal path to thereby compensate for input offset voltage of the amplification circuit while suppressing output chopping ripple from arising.

A circuit includes a first operational amplifier having an inverting input and a non-inverting input, and a negative resistance circuit connected to the inverting input of the operational amplifier. The negative resistance circuit includes a second operational amplifier, a current source controlled by the second operational amplifier, and a cross-coupled transistor circuit having at least one transistor biased by a current produced by the current source.

Chopper amplifiers with multiple sensing points for correcting input offset are disclosed herein. In certain embodiments, a chopper amplifier includes chopper amplifier circuitry including an input chopping circuit, an amplification circuit, and an output chopping circuit electrically connected in a cascade along a signal path. The chopper amplifier further incudes a multi-point sensed offset correction circuit that generates an input offset compensation signal based on sensing a signal level of the signal path at multiple signal points. Furthermore, the multi-point sensed offset correction circuit injects the input offset compensation signal into the signal path to thereby compensate for input offset voltage of the amplification circuit while suppressing output chopping ripple from arising.

According to a first aspect of the embodiments, a microphone mixer is provided comprising: an input adapted to receive differential microphone (mic) output signals; a gain-trim circuit adapted to receive the differential mic output signals, and which includes a substantially fully differential amplifier adapted to amplify the received differential mic output signals through use of a gain-trim output adjustment device that provides a variable gain amount ranging from a first gain-trim gain value to a second gain-trim gain value, to produce differential gain-trim circuit output signals; a fader circuit adapted to receive the differential gain-trim circuit output signals, and which includes a differential amplifier adapted to attenuate the received differential gain-trim circuit output signals through use of a fader output adjustment device that provides a variable gain amount ranging from a first fader gain value to a second fader value; and a common adjustment apparatus that mechanically ties the gain-trim output adjustment device with the fader output adjustment device such that the first gain-trim gain value and first fader gain value are obtained substantially simultaneously at a first position of the common adjustment apparatus, and the second gain-trim gain value and second fader gain value are obtained substantially simultaneously at a second position of the common adjustment apparatus.

A detection circuit that may include (i) a photosensor that is configured to convert light to current; wherein the photosensor has an output node and is configured to operate as a current source, (ii) an adder, and (iii) multiple amplification branches that are coupled in parallel between the adder and the output node of the photosensor. The multiple amplification branches do not share a feedback circuit, wherein all amplification branches of the multiple amplification branches comprise an amplifier of a same type, wherein the type is selected out of a transimpedance amplifier and a current amplifier.

The application describes a transimpedance amplifier circuit having a first circuit branch extending between first and second supply nodes. An input NMOS transistor is located in the first circuit branch, with its drain terminal coupled to the first supply node via a load resistor, its source terminal coupled to the second supply node and its gate terminal coupled to an input node for receiving an input signal. The circuit includes a PMOS transistor having its source terminal coupled to a third supply node, its drain terminal coupled to the first circuit branch, at a node in a part of the first circuit branch extending from the drain terminal of the input transistor to the load resistor, and its gate terminal coupled to the input node. A drain current of the PMOS transistor contributes a proportion but not all of a drain current for input NMOS transistor.

A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.

An adaptive DC-DC boost converter arrangement and an electronic circuit including such an arrangement are provided. The arrangement includes a circuit board with a plurality of electronic components mounted thereon, implementing an adaptive DC-DC boost converter circuit and a boost decoupling capacitor. The adaptive DC-DC boost converter circuit comprises a DC-DC boost converter having a converter set value input, a boost supply input, and a boost voltage output, and an adaptive DC-DC boost control unit having a control input and a control output. An acoustical noise suppression filter is present having a filter input connected to the control output of the adaptive DC-DC boost control unit and a filter output connected to the converter set value input of the DC-DC boost converter.