According to an embodiment, an operational amplifier includes a first amplifier stage coupled between an input node and an intermediate node, a second amplifier stage coupled between the intermediate node and an output node, a compensation capacitor having a first terminal coupled to the intermediate node and a second terminal, and a compensation amplifier coupled between the output node and the second terminal. The compensation amplifier has a positive gain greater than one.

A conversion circuit for converting a current signal into a first output voltage signal, where the current signal flows through a sensing component, is provided. The conversion circuit includes: a first current eliminating circuit, configured to eliminate a first current in the current signal. The first current eliminating circuit includes: a current sample and hold circuit; and a current driving circuit, coupled between the sensing component and the current sample and hold circuit; a second current eliminating circuit, coupled to the sensing component and configured to eliminate a second current in the current signal; and an integrating circuit, coupled to the sensing component and configured to integrate a third current in the current signal, and output a first input voltage signal between a first integration output terminal and a second integration output terminal.

An analog signal processing circuit can include a front-stage processing module configured to process an analog signal to generate a first differential signal; at least one switched capacitor circuit, coupled with the front-stage processing module to receive the first differential signal, and configured to integrate or sample and hold the first differential signal to generate a second differential signal; and where the front-stage processing module and the at least one switched capacitor circuit receive synchronous control signals, the front-stage processing module chops the analog signal according to the control signals, and the at least one switched capacitor circuit is in different operating modes at a first phase and a second phase of an operation cycle of the control signals, in order to eliminate DC offset voltages of the front-stage processing module and the at least one switched capacitor circuit.

Offset compensation circuitry for an amplification circuit. One example embodiment is a method of compensating a primary operational amplifier including: creating, by way of a companion circuit, a square wave having an amplitude, a period, and a direct current bias (DC bias), the amplitude proportional to an offset of the primary operational amplifier; integrating, by the companion circuit, the amplitude of the square wave for less than the period of the square wave, the integrating creates a compensation signal; and applying the compensation signal to the primary operational amplifier.

An integrated circuit includes an amplifier configured to amplify an analog signal, and an offset adjustment circuit that is provided in a stage prior to the amplifier and that is configured to adjust an offset amount of the analog signal to be amplified by the amplifier.

An analog-to-digital converter circuit includes: a first operation amplifier suitable for comparing a ramp voltage and a voltage to be converted so as to produce an amplification result and outputting the amplification result; a second operation amplifier suitable for comparing the amplification result transferred to a first input terminal with a reference voltage transferred to a second input terminal so as to produce a comparison result and outputting the comparison result; a leakage current measurer suitable for measuring a leakage current to the first input terminal; and a leakage current generator suitable for causing a current of the same amount as that of the leakage current measured by the leakage current measurer to flow to the second input terminal.

A DC offset cancellation circuit and a DC offset cancellation method are disclosed. The DC offset cancellation circuit comprises a high-speed amplifier, a voltage comparator, a microprocessor, and a digital-to-analog converter. The high-speed amplifier comprises an input stage with a DC offset cancellation function, an amplification stage, and an output buffer stage. The voltage comparator is connected to the output buffer stage. The microprocessor is connected to the voltage comparator. The digital-to-analog converter is connected to the microprocessor. The digital-to-analog converter is connected to the input stage.

A multi-stage amplifier circuit includes a pre-stage amplifier circuit and a floating control circuit. The pre-stage amplifier circuit amplifies a voltage difference between its input terminals, to generate plural pre-stage transconductance currents flowing through corresponding plural pre-stage transconductance nodes. The floating control circuit includes: a floating reference transistor configured as a source follower and a floating amplifier. The floating amplifier and the floating reference transistor are coupled to form feedback control and to generate an upper driving signal and a lower driving signal according to a floating reference level in the floating control circuit. The upper driving signal is higher than the lower driving signal with a predetermined voltage difference. The floating control circuit is electrically connected to the plural pre-stage transconductance nodes and is floating in common mode relative to the pre-stage transconductance nodes.

An amplifier circuit includes a sampling circuit and an amplifier connected to an output of the sampling circuit. A feedback capacitor is between an output terminal of the amplifier and an output terminal of the sampling circuit. A quantizer that includes a comparator is configured to quantize a voltage at the output terminal of the sampling circuit according to a comparison of a voltage at the output terminal of the sampling circuit to a voltage at the reference potential terminal of the comparator. The quantizer outputs a digital code according to the voltage comparison. A control circuit receives the digital code from the quantizer and stores the digital code in a register as a cancellation digital code. A digital-analog (D/A) converter outputs an analog signal in accordance with digital codes from the control circuit.

A chopper amplifier and method of operation are described. The chopper amplifier comprises a first chopper arranged to modulate an input signal using a first chopper signal having a chopper frequency. An amplification stage has an input arranged to receive the chopped signal and an output, and supplies an amplified signal at the output. An output chopper is arranged to integrate the amplified signal using a second chopper signal having the chopper frequency to generate an amplified output signal. The amplification stage is further configured to filter the chopped signal to attenuate signal components having frequencies lower than the chopper frequency.