One embodiment provides an analog front-end circuit. When a chopping signal has a first logical value, a non-inverting instrumentation preamplifier subtracts a second input voltage from a first input voltage and generates a first output voltage by amplifying a subtraction voltage while outputting the second input voltage as a second output voltage. When the chopping signal has a second logical value, the non-inverting instrumentation preamplifier subtracts the first input voltage from the second input voltage and generates the first output voltage by amplifying and then inverting the polarity of a subtraction voltage while outputting the second input voltage as the second output voltage.

The disclosure relates to an alternating current (AC) coupling circuit including first and second capacitors having first and second input terminals configured to receive an input differential signal and generate an output differential signal at first and second output terminals of the first and second capacitors. The AC coupling circuit further includes a baseline wander correction circuit configured to make the output differential signal resistant to baseline wander due to the input differential signal including one or more time intervals of unbalanced data. The baseline wander correction circuit includes a differential difference amplifier (DDA) having a first differential input configured to receive the input differential signal, a differential output configured to generate a compensation differential signal, and a second differential input configured to receive the compensation differential signal. The compensation differential signal is applied to the output terminals of the first and second capacitors via a pair of resistors, respectively.

A device includes an amplifier and calibration circuitry coupled to the amplifier. The calibration circuitry is configured to receive calibration values. The calibration circuitry is also configured to generate an output value in response to receiving a timing input.

Certain aspects of the present disclosure provide methods and apparatus for implementing an amplification system. The amplification system includes an amplifier comprising differential inputs and an output. The differential inputs include an inverting input and a non-inverting input. The amplification system further includes a feedback path from the output coupled to the inverting input. The feedback path from the output is coupled to at least one of an inverting amplifier or buffer, and the at least one of the inverting amplifier or buffer is further coupled to the non-inverting input.

Disclosed embodiments include a method for reducing amplifier offset drift comprised of receiving a first differential input signal at a first transistor base terminal and a second differential input signal at a second transistor base terminal, coupling the collector of the first transistor to the emitter of a third transistor and the emitter of the second transistor to the emitter of a fourth transistor, then coupling the base of the third transistor to the base of the fourth transistor. The method is also comprised of coupling the collector of the fourth transistor to an output terminal, generating a temperature dependent error correction current to minimize the difference in the amount of current flowing through the third transistor and the amount of current flowing through the fourth transistor, then injecting the error correction current into the emitter terminal of at least one of either the third transistor or the fourth transistor.

An electronic circuit includes an isolation amplifier, having a first input terminal receiving an AC-signal and including a linear opto-isolator. The opto-isolator has a first output terminal that provides a unipolar signal having an AC-component proportional to the input signal. The circuit includes a transimpedance receiver with first and second operational amplifiers. The first amplifier has a second output terminal and first and second differential input terminals, with the first differential input terminal receiving and amplifying the unipolar output signal from the first output terminal providing an output signal from the circuit at the second output terminal. The second amplifier is configured as an integrator, having a third output terminal coupled to the second differential input terminal and having third and fourth differential input terminals, with the third differential input terminal receiving the output signal from the second output terminal and the fourth differential input terminal connected to ground.

An envelope tracking power supply, which includes a parallel amplifier, switching circuitry, and a parallel switching supply, is disclosed. The envelope tracking power supply provides an envelope power supply signal to a load. The parallel amplifier regulates an envelope power supply voltage of the envelope power supply signal based on a setpoint of the envelope power supply voltage. The switching circuitry at least partially provides the envelope power supply signal via a first inductive element and drives an output current from the parallel amplifier toward zero. The parallel switching supply provides an assist current to further drive the output current from the parallel amplifier toward zero based on an estimate of a current in the first inductive element and an estimate of a current in the load.

An apparatus, system, and method are disclosed for compensating input offset of an amplifier having first and second amplifier output nodes. The method comprises generating a proportional-to-absolute temperature (PTAT) current, generating a complementary-to-absolute temperature (CTAT) current, and selecting, based on the input offset, one of the first and second amplifier output nodes into which a compensation current is to be coupled. The compensation current is based on a selected one of the PTAT current and CTAT current.

A digitally-controlled transimpedance amplifier (TIA) circuit is provided in which a plurality of feedback loops are digitally controlled, including, but not limited to, the DC offset cancellation loop, the variable gain control loop, and the TIA feedback impedance adjustment loop. The digitally-controlled TIA circuit includes digital loop-control circuitry that consumes less area on the TIA IC chip than the analog circuitry traditionally used to perform the feedback loop control in the analog domain. In addition, because digital logic continues to shrink as IC processes continue to evolve, the size of the IC chip packages will further decrease over time, leading to a smaller footprint in systems in which they are employed. The digital loop control circuitry is also capable of independently varying the gains of multiple gain stages of the variable gain control circuit to provide better control over the gain stages and better overall performance of the TIA circuit.

Offset compensation circuitry for an amplification circuit. One example embodiment is a method of compensating a primary operational amplifier including: creating, by way of a companion circuit, a square wave having an amplitude, a period, and a direct current bias (DC bias), the amplitude proportional to an offset of the primary operational amplifier; integrating, by the companion circuit, the amplitude of the square wave for less than the period of the square wave, the integrating creates a compensation signal; and applying the compensation signal to the primary operational amplifier.