A line receiver comprising a switched capacitor circuit and a buffer is described. The buffer may be configured to receive, through the switched capacitor circuit, an analog signal. In response, the buffer may provide an output signal to a load, such as an analog-to-digital converter. The switched capacitor circuit may be controlled by a control circuitry, and may charge at least one capacitive element to a desired reference voltage. The reference voltage may be selected so as to bias the buffer with a desired DC current, and consequently, to provide a desired degree if linearity. The line receiver may further comprise a bias circuit configured to generate the reference voltage needed to bias the buffer with the desired DC current.

A switched-capacitor power amplifier comprising a plurality of cells and methods for its operation are described. Switched signal lines switch supply to respective capacitors. Switches connect respective signal lines to a first supply and switches connect respective signal lines to a second supply. Pairs of switches on each signal line are switched so that one is switched off whilst the other is switched on. In a full amplitude mode, operation of the switches provides an output having a peak determined by the first supply. A switch signal line is provided between nodes in respective signal lines, a switch being provided in the switch signal line. In a half amplitude mode, switch is switched at the radio frequency in the other direction to that of switches connecting the signal lines to respective ones of the first and second supplies with the other switches being kept open.

In some embodiments, a wireless local area network (WLAN) front-end can be implemented on a semiconductor die having a semiconductor substrate, and a power amplifier implemented on the semiconductor substrate and configured for WLAN transmit operation associated with a frequency range. The semiconductor die can further include a low-noise amplifier (LNA) implemented on the semiconductor substrate and configured for WLAN receive operation associated with the frequency range. The semiconductor die can further include a transmit/receive switch implemented on the semiconductor substrate and configured to support the transmit and receive operations.

Envelope trackers providing compensation for power amplifier output load variation are provided herein. In certain configurations, a radio frequency (RF) system includes an antenna, a power amplifier that receives a radio frequency signal and outputs an amplified radio frequency signal to the antenna, a plurality of detectors coupled to the power amplifier and operable to generate a plurality of detection signals, and an envelope tracker that controls a supply voltage of the power amplifier based on an envelope of the radio frequency signal. The envelope tracker processes the plurality of detection signals to generate a load variation detection signal indicating a change in an output load of the power amplifier arising from a change in a voltage standing wave ratio (VSWR) of the antenna. Additionally, the envelope tracker adjusts a gain of the power amplifier based on the load variation detection signal.

Embodiments of radio frequency (RF) systems include a transmit/receive switch integrated with one or more power amplifiers and/or other components. The power amplifiers can have transformer-based architectures, and a power amplifier and switch can be integrated onto a single complementary metal oxide semiconductor die.

Certain aspects of the present disclosure provide a switch architecture for switching between a low power amplifier and a high power amplifier. One example amplification system includes a high power amplifier and a low power amplifier. The amplification system further includes a first switch coupled between the high power amplifier and an output. The amplification system further includes a second switch coupled between the output and a reference potential. The second switch is further coupled between the low power amplifier and the output and configured to selectively couple the low power amplifier to the output. The amplification system further includes a third switch coupled between the low power amplifier and the second switch.

A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source input stage and a common gate output stage can be turned on or off using the gate of the output stage. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input stage of each cascode. Further switches used for switching degeneration inductors, gate/sources caps and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

Methods and devices for tuning a configurable amplifier of a multi-band RF front-end stage based on a setting of a band switch are described. A lookup table provided with the configurable amplifier is used to map configuration control data of the band switch to configuration control data of the configurable amplifier. The configurable amplifier can be part of a transmit path or a receive path of the multi-band RF front-end stage.

Envelope trackers providing compensation for power amplifier output load variation are provided herein. In certain configurations, a radio frequency (RF) system includes a power amplifier that amplifies an RF signal, an output detector coupled to an output of the power amplifier and that generates an output detection signal, an input detector coupled to an input of the power amplifier and that generates an input detection signal, and an envelope tracker that generates a power amplifier supply voltage for the power amplifier based on an envelope of the RF signal. The envelope tracker compensates the power amplifier for output load variation based on the output detection signal and the input detection signal.

Circuits, devices and methods are disclosed, including radio-frequency circuitry comprising a polar modulator configured to invert a sampled transmitted signal into an inverted sampled transmitted signal, a signal combiner configured to combine the inverted sampled transmitted signal with a received signal and a control logic circuit coupled to the polar modulator, the control logic circuit configured to adjust one or more tuning parameters of the polar modulator for inverting the sampled transmitted signal.