H03F2200/426

RADIO FREQUENCY POWER AMPLIFIER
20230082905 · 2023-03-16 ·

According to one aspect, an integrated circuit includes a power amplifier having a succession of at least two amplifier stages. The two amplifier stages include a first amplifier stage configured to receive a radio frequency signal as input and a last amplifier stage configured to deliver as an output of an amplified radio frequency signal. The power amplifier further includes a safety circuit with a control circuit configured to compare the amplified radio frequency signal voltage with a threshold voltage. The safety circuit further comprises a gain reduction circuit configured to reduce a bias voltage of an upstream amplifier stage of the last amplifier stage when the amplified radio frequency signal voltage is greater than the threshold voltage.

PROTECTION CIRCUIT AND METHOD

A protection circuit and method for protecting driven circuitry against voltage peaks in a radio frequency signal, “V.sub.RF”, past a predetermined voltage level “V.sub.detect”. The protection circuit includes an input for receiving the radio frequency signal. The protection circuit also includes at least one amplification stage coupled to the input. The amplification stage is operable to produce an amplified signal based on V.sub.detect−V.sub.RF. The protection circuit further includes a hold circuit operable to determine, from the amplified signal produced by the amplification stage, whether a peak voltage V.sub.peak of the radio frequency signal exceeds V.sub.detect. The hold circuit is operable to output a first detection value if V.sub.peak exceeds V.sub.detect. The hold circuit is operable to output a second detection value if V.sub.peak does not exceed V.sub.detect. The protection circuit also includes a latch circuit operable to latch the detection value outputted by the hold circuit.

ELECTRONIC DEVICE AND METHOD INCLUDING POWER AMPLIFIER MODULE HAVING PROTECTION CIRCUIT
20230163730 · 2023-05-25 ·

An electronic device includes: an antenna, a PAM including a PA configured to amplify a transmitting signal and a protection circuit, a PMIC configured to supply voltage to the PA, and at least one processor is configured to: provide a first signal, to a NAND gate in the protection circuit, provide to a AND gate in the protection circuit, a second signal indicating a result of a logical operation between the first signal and a bias enable signal for the PA, provide to the AND gate, a third signal indicating whether the transmitting signal is input to the PAM, provide to a switching circuit, a fourth signal indicating a result of logical operation between the second signal and the third signal, identify whether to apply a bias voltage to the PA based on the fourth signal, and transmit the transmitting signal, to the external electronic device, via the antenna.

Limiting circuit and electronic device

In a limiting circuit that limits an output voltage of an operational amplifier, the signal quality of the output voltage is improved. The limiting circuit includes a short-circuit transistor and a gate voltage supply unit. In the limiting circuit, the short-circuit transistor short-circuits a path between an input terminal and an output terminal of the operational amplifier in a case where a voltage between the input terminal of the operational amplifier and the gate is higher than a predetermined threshold voltage. Furthermore, in the limiting circuit, the gate voltage supply unit supplies a voltage to the gate, the voltage depending on the threshold voltage and the output voltage of the output terminal.

Amplifier circuit

An amplifier circuit amplifies a radio-frequency signal. The amplifier circuit includes an amplifier, an input matching circuit connected to an input side of the amplifier and matches impedance, and a protection circuit connected to a node in a path within a path between an input matching circuit and the amplifier. The protection circuit includes a first diode connected between the node and a ground, and a second diode connected in parallel with the first diode and connected in a direction opposite to the first diode between the node and the ground. A threshold voltage of each of the first diode and the second diode is greater than a maximum voltage amplitude of the input signal at the node and is less than a difference between a withstand voltage of the amplifier and the bias voltage.

Microwave amplifiers tolerant to electrical overstress

Microwave amplifiers tolerant to electrical overstress are provided. In certain embodiments, a monolithic microwave integrated circuit (MMIC) includes a signal pad that receives a radio frequency (RF) signal, a ground pad, a balun including a primary section that receives the RF signal and a secondary section that outputs a differential RF signal, an amplifier that amplifies the differential RF signal, and a plurality of decoupling elements, some of them electrically connected between the primary section and the ground pad, others electrically connected in the secondary section to a plurality of the amplifier's nodes, and operable to protect the amplifier from electrical overstress. Such electrical overstress events can include electrostatic discharge (ESD) events, such as field-induced charged-device model (FICDM) events, as well as other types of overstress conditions.

POWER AMPLIFICATION CIRCUIT INCLUDING PROTECTION CIRCUIT AND ELECTRONIC DEVICE INCLUDING POWER AMPLIFICATION CIRCUIT
20220337201 · 2022-10-20 ·

A power amplification circuit may comprise a power distributor configured to receive a radio frequency (RF) signal and output a first RF signal and a second RF signal, a first power amplifier configured to receive the first RF signal from the power distributor and amplify the first RF signal based on a first bias, a second power amplifier configured to receive the second RF signal from the power distributor and amplify the second RF signal based on a second bias, an impedance matching circuit configured to receive the first RF signal amplified by the first power amplifier and the second RF signal amplified by the second power amplifier, and a protection circuit configured to identify a current input to a bias terminal of the second power amplifier and, control a magnitude of the current input to the bias terminal based on the identified input current.

OVERDRIVE PROTECTION CIRCUIT WITH FAST RECOVERY
20230108810 · 2023-04-06 ·

An amplifier circuit comprising a power amplifier and a protection circuit coupled to the power amplifier. The protection circuit is configured to detect an overdrive condition and, in response to detecting an overdrive condition, apply a clamping status to the protection circuit to reduce a bias current to the power amplifier. The protection circuit has a capacitor and a recovery circuit including: a sensing component configured to monitor a change of charging and discharging currents to and from the capacitor respectively during the clamping status; a first device configured to set a time constant of the recovery circuit; and a second device configured to reset the protection circuit to remove the clamping status when the change of charging or discharging current is beyond a predetermined threshold.

Semiconductor device and power amplifier module

A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

Transmitting and receiving device having a wide-band HF power amplifier, in particular an N-way Doherty amplifier having active load modulation

A transmitting and receiving device having a module (GSZ) with a configurable HF high-power amplifier (HPA) that includes a main power amplifier (DM) with a main amplifier core and at least one peak power amplifier (DP1) having an auxiliary amplifier core. A switching element connected to inputs of the main power amplifier and the at least one peak power amplifier is connected to a digital input signal divider (ET) having a plurality of outputs and an output combiner (C) is connected to outputs of the amplifier cores for the main power amplifier and the at least one peak power amplifier. A multi-harmonic transformation line (LAH) is connected at the amplifier core output of the main power amplifier and at the amplifier core output of the at least one peak power amplifier, and a circulator (Z1) is connected to the output of the output combiner or an impedance converter (AN1).