A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.

This application relates to Class D amplifier circuits. A modulator controls a Class D output stage based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block, which may comprise an ADC, generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input of a signal selector block. The input signal may be received at a second input of the signal selector block. The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block.

Power amplifiers with adaptive bias for envelope tracking applications are provided herein. In certain embodiments, an envelope tracking system includes a power amplifier that amplifies a radio frequency (RF) signal and that receives power from a power amplifier supply voltage, and an envelope tracker that controls a voltage level of the power amplifier supply voltage based on an envelope of the RF signal. The power amplifier includes a current mirror having an input that receives a reference current, an output electrically connected to the power amplifier supply voltage, and a node that outputs a gate bias voltage. The power amplifier further includes a field-effect transistor that amplifies the radio frequency signal and a first depletion-mode transistor having a gate connected to the node of the current mirror and a source connected to a gate of the field-effect transistor.

The present disclosure relates to amplifier circuitry (300) that includes a linear amplifier stage (110) that receives an input signal and outputs a first drive signal to an output node (302) and a switching amplifier stage (130) operable to output a second drive signal to the output node (302). A controller (340) is selectively operable in a first dual-amplifier mode, in which switching of the switching amplifier stage is controlled based on a current of the first drive signal, such that the current of the first drive signal does not exceed a first current threshold magnitude; and at least one other mode, in which the controller controls the switching amplifier stage such that the current of the first drive signal may exceed the first current threshold magnitude. The controller (340) selectively controls the mode of operation based on an indication (S.sub.SL) of signal level of the output signal.

A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.

A switch controller for charge pump tracker circuitry is disclosed. The switch controller includes first monitoring circuitry configured to monitor a first voltage across a first flying capacitor during a first discharging phase. A second monitoring circuitry is configured to monitor a second voltage across a second flying capacitor during a second discharging phase. Further included is boost logic circuitry in communication with the first monitoring circuitry and the second monitoring circuitry, wherein the boost logic circuitry is configured in response to control a first switch network coupled to the first flying capacitor and a second switch network coupled to the second flying capacitor so that the first discharging phase and the second discharging phase alternate in an interleaved mode, and so that the first discharging phase and the second discharging phase are in phase during a parallel boost mode.

A multi-level supply modulator for RF power amplifiers requires only a single independent voltage supply along with one or more flying capacitors to achieve multiple output levels. The flying capacitor is used to store the intermediate voltage level between the DC supply level and ground. A switch network is connected between the DC voltage supply and the power amplifier and is configured to provide power at variable, discrete DC voltages, for example the DC voltage supply level, ground, and a level halfway between the DC voltage supply level and ground. The flying capacitor is connected to switches in the switch network, and a sensing circuit detects the voltage across the flying capacitor and generates a feedback signal. Control circuitry controls the switch network (and thus the power supplied to the amplifier) based on the feedback signal.

Charge pump tracker circuitry is disclosed having a first switch network configured to couple a first flying capacitor between a voltage input terminal and a ground terminal during a first charging phase and couple the first flying capacitor between the voltage input terminal and a pump output terminal during a first discharging phase. A second switch network is configured to couple a second flying capacitor between the voltage input terminal and the ground terminal during a second charging phase and couple the second flying capacitor between the voltage input terminal and the pump output terminal during a second discharging phase. A switch controller is configured to monitor first and second voltages across the first and second flying capacitors, respectively, during the first and second discharging phases and in response to control the first and second switch networks so that the first the second discharging phases alternate in an interleaved mode.

High-performance radio frequency analog-to-digital converters (RF ADCs) demand high bandwidth, high linearity, and low noise input amplifiers. A Class-AB amplifier, including common-gate transistor devices and common-source transistor devices operating in parallel, offers high bandwidth and high linearity, while offering lower power operation when compared to Class-A amplifiers. The Class-AB amplifier can be followed by a Class-AB unity gain buffer comprising common-source transistor devices to provide additional isolation for the RF ADC from the circuitry preceding the Class-AB amplifier.

The present disclosure relates to amplifier circuitry (300) that includes a linear amplifier stage (110) that receives an input signal and outputs a first drive signal to an output node (302) and a switching amplifier stage (130) operable to output a second drive signal to the output node (302). A controller (340) is selectively operable in a first dual-amplifier mode, in which switching of the switching amplifier stage is controlled based on a current of the first drive signal, such that the current of the first drive signal does not exceed a first current threshold magnitude; and at least one other mode, in which the controller controls the switching amplifier stage such that the current of the first drive signal may exceed the first current threshold magnitude. The controller (340) selectively controls the mode of operation based on an indication (S.sub.SL) of signal level of the output signal.