An RF power detector adapted to detect an RF power of an RF signal, includes, in part, an antenna adapted to receive the RF signal, a narrow-band RF power converter adapted to convert the RF signal to a DC signal, an accelerometer, and a magnetometer. The accelerometer and magnetometer are adapted to determine the orientation and location of the power detector. The power detector optionally includes a gyroscope. The narrow-band RF power converter may be a rectifier tuned to the frequency of the RF signal. The power detector optionally includes an indicator adapted to provide information representative of the amount of the DC power of the DC signal, as well as position and orientation of the power detector. The power detector may be adapted to be inserted into a mobile device so as to provide the information about the amount of DC power, orientation and position to the mobile device.

In an embodiment, a method for determining the phase shift between a first signal and a second signal includes: delivering the first signal to a first input of a 90° hybrid coupler; delivering the second signal to a second input of the 90° hybrid coupler; determining a first piece of information relating to a power of a first output signal delivered to a first output of the 90° hybrid coupler; determining a second piece of information relating to a power of a second output signal delivered to a second output of the coupler; and adjusting the phase of the second signal until obtaining a calibrated phase for which the first piece of information is substantially equal to the second piece of information, wherein the first and second signals have identical frequencies, and wherein the phase shift between the first signal and the second signal is equal to the calibrated phase.

Differential control circuitry configured to control the operation of a power converter. The control circuitry of this disclosure is configured to receive two differential feedback signals from a fully differential amplifier. The amplifier receives an output voltage (Vout) from the switched mode power supply as well as a reference voltage (Vref). When Vout is less than Vref, the control circuitry may output a pulse width modulation (PWM) control signal to the switched mode power supply with a duty cycle of the PWM control signal based on a relative difference between a positive difference voltage and a negative difference voltage. When Vout is greater than Vref, the control circuitry may output a pulse frequency modulation (PFM) control signal to the switched mode power supply with a switching time of the PFM control signal based on a relative difference between the positive difference voltage and the negative difference voltage.

According to one or more embodiments of the disclosure, an electronic device may include a power amplifier, a voltage generator, an antenna, and a communication processor. The CP determines whether an output waveform of the transmission signal which is output through the antenna is a first waveform or a second waveform. If the output waveform is the first waveform, the voltage generator generates a first output voltage for amplifying the first waveform by applying a first direct current (DC) power source of one or more first voltages. If the output waveform is the second waveform, the voltage generator generates a second output voltage for amplifying the second waveform by applying a second DC power source of a second voltage shifted by a designated level with respect to the first voltage, based on a peak power of the first waveform and a peak power of the second waveform.

An audio amplifier includes: a buck controller configured to control an output voltage at a first supply terminal, the output voltage selected from a set including a plurality of output voltages, where the output voltage takes a settling time to settle; a first audio bridge including: a class-AB driver stage coupled to the first supply terminal, and a delay insertion circuit configured to receive a processed digital stream and provide the processed digital stream to the class-AB driver stage a delay time after receiving the processed digital stream, where the delay time is based on the settling time; and an audio amplitude detector configured to detect a first peak amplitude in the first digital audio stream, where the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus a headroom voltage.

Systems and devices configured by an algorithm to prevent or limit a speaker over-excursion are disclosed. The disclosed algorithm is computationally efficient because it exploits a relationship between an audio signal and a speaker's excursion that exists at low-frequencies, below a self-resonance of a speaker. The disclosed algorithm combines the low-frequency excursion protection with a high-frequency, transient excursion protection. The combined approach allows the transient excursion protection to use a shorter delay than otherwise possible. The shorter delay allows for a compressor to apply attenuation to a transient audio signal before a momentum of the speaker, caused by the transient audio signal, grows too large to be controlled.

Disclosed is envelope tracking circuitry having an envelope tracking integrated circuit (ETIC) coupled to a power supply to provide an envelope tracked power signal to a power amplifier (PA) with a filter equalizer configured to inject an error-correcting signal into the ETIC in response to equalizer settings. Further included is PA resistance estimator circuitry having a first peak detector circuit configured to capture within a window first peaks associated with a sense current generated by the ETIC, a second peak detector circuit configured to capture within the window second peaks associated with a scaled supply voltage corresponding to the envelope tracked power signal, comparator circuitry configured to receive the first peaks and receive the second peaks and generate an estimation of PA resistance, and an equalizer settings correction circuit configured to receive the estimation of PA resistance and update the equalizer settings in response to the estimation of PA resistance.

Circuits and methods for reducing the cost and/or power consumption of a user terminal and/or the gateway of a telecommunications system that may include a telecommunications satellite. Embodiments include “chained” feedback-regulated voltage supply circuits. These circuits substantially eliminate the need for separate regulator circuits for each regulated voltage. These circuits are designed to automatically maintain a substantially constant first voltage at a first node for a first load and maintain a substantially constant second voltage at a second node for a second load. Some disclosed configurations of these circuits may be useful to achieve greater current capability at the same voltage without requiring larger switches and higher inductor and capacitor sizes that may be needed in a single (conventional) stage voltage supply circuit.

An audio amplifier includes: a buck controller configured to control an output voltage at a first supply terminal, the output voltage selected from a set including a plurality of output voltages, where the output voltage takes a settling time to settle; a first audio bridge including: a class-AB driver stage coupled to the first supply terminal, and a delay insertion circuit configured to receive a processed digital stream and provide the processed digital stream to the class-AB driver stage a delay time after receiving the processed digital stream, where the delay time is based on the settling time; and an audio amplitude detector configured to detect a first peak amplitude in the first digital audio stream, where the buck controller is configured to select a lowest output voltage from the set that is higher than the first peak amplitude plus a headroom voltage.

In certain aspects, an apparatus includes a transformer including an input inductor and an output inductor, wherein the input inductor is magnetically coupled to the output inductor. The apparatus also includes a transconductance driver configured to drive the input inductor based on an input signal. The apparatus further includes a feedback circuit configured to detect an output voltage swing at the output inductor, generate a regulated voltage at the input inductor, and control the regulated voltage based on the detected output voltage swing.