In certain aspects, a chip includes a pad, and a power amplifier having a first output and a second output. The chip also includes a transformer, wherein the transformer includes a first inductor coupled between a first terminal and a second terminal of the transformer, wherein the first terminal is coupled to the first output of the power amplifier, and the second terminal is coupled to the second output of the power amplifier. The transformer also includes a second inductor coupled between a third terminal and a fourth terminal of the transformer, wherein the third terminal is coupled to the pad. The chip also includes a first switch coupled to the fourth terminal, a shunt inductor coupled in parallel with the first switch, and a low-noise amplifier coupled to the third terminal.

An amplifier includes a differential amplification block suitable for receiving and amplifying a first differential input signal and a second differential input signal; an output block suitable for determining an output signal according to a state of amplified signals outputted from the differential amplification block; and an output range restriction block suitable for controlling an output range of the output signal outputted from the output block based on a maximum clamping signal and a minimum clamping signal.

A self-oscillating amplifier system comprising at least two integrator stages connected to receive an input signal and provide a reference signal, a comparator configured to provide a modulation signal based on the reference 5 signal and a modulation feedback signal, and a switching stage connected to form a switching output signal. The system further comprises a voltage limiting circuit connected between the input signal and the reference signal, for limiting a voltage across the at least two integrator stages. By connecting one single voltage limiting circuit across all integrator stages, the modulation signal will be limited to the voltage limit of this voltage limiting circuit.

Programmable clamping methods and devices providing adjustable clamping powers to accommodate different applications and requirements are disclosed. The described devices can use switchable clamping circuits having different structures, body-controlled clamping circuits, or clamping circuits adjusting their input power levels using programmable resistive ladders. Examples of how the disclosed devices can be combined to improve design flexibility are also provided.

Methods and devices for limiting the power level of low noise amplifiers (LNA) implemented in radio frequency (RF) receiver front-ends. The described methods are applicable to bypass, low and high gain modes of the LNA. According to the described methods, the decoder allows the signal to be clamped before or after being attenuated. The benefit of such methods is to improve large signal performances (e.g. IIP3, P1dB) of the RF receiver front-end, while still meeting the clamping requirements, or improve (lower) clamped output power, while still meeting large signal performances (e.g. IIP3, P1dB).

Techniques for limiting the output voltage of an amplifier without directly affecting an output current of the amplifier are provided. In an example, an amplifier can include a plurality of amplifier stages configured to receive an input voltage and to provide an output voltage as a function of the input voltage, and a comparator configured to receive a voltage limit and a representation of the output voltage of the amplifier, to adjust current at an input to a first amplifier stage of the plurality of amplifier stages when the output voltage violates the voltage limit, and to clamp the output voltage at an offset from the voltage limit.

An amplification circuit includes an input terminal to which a signal to be amplified is input, a first FET having a gate to which a signal input to the input terminal is applied, second and third FETs that are connected between a power supply and a reference potential, an output terminal that is provided between a load and the third FET nearest to the power supply and configured to output an amplified signal, a voltage-dividing resistor circuit configured to generate a bias to be applied to gates of the second and third FETs, and a clamping circuit configured to clamp a bias to be applied to the gate of the third FET when a bias to be applied from the voltage-dividing resistor circuit to the gate of the second FET exceeds a predetermined reference voltage. The first to third FETS are vertically stacked and connected.

A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.

Amplifier having electrostatic discharge and surge protection circuit. In some embodiments, a radio-frequency integrated circuit can include an amplifier, a controller configured to control operation of the amplifier, and a clamp circuit configured to provide electrostatic discharge protection and surge protection for either or both of the amplifier and the controller. The clamp circuit can include a feedback combination clamp implemented to direct a current associated with either or both of an electrostatic discharge and a surge at a first node to a second node.

A power amplifier comprising a first member and a second member including a compound semiconductor region joined to a first face of the first member including a semiconductor region. The second member includes an amplifier circuit including a compound semiconductor element, and multiple clamp diodes connected in multiple stages and between an output port of the amplifier circuit and ground. The first member includes a switch, connected between an extension point, which is a middle point of the multiple clamp diodes and the ground, a temperature sensor, and a switch control circuit which performs on-off control of the switch based on a result of measurement by the temperature sensor. The extension point is connected to the switch via a path including an inter-member connection wire on an interlayer insulating film from the first face of the first member to a surface of the second member.