Disclosed is power amplifier circuitry having a bipolar junction power transistor with a base, a collector, and an emitter. The power amplifier circuitry includes bias correction sub-circuitry configured to generate a compensation current substantially opposite in phase and substantially equal in magnitude to an error current passed by a parasitic base-collector capacitance inherently coupled between the base and collector, wherein the bias correction sub-circuitry has a compensation output coupled to the base and through which the compensation current flows to substantially cancel the error current.

A method is provided. The method includes estimating adjacent channel leakage ratios respectively corresponding based on a test output signal output from a power amplifier according to a test input signal corresponding to a plurality of frequencies; selecting a test delay value corresponding to a largest value among the estimated adjacent channel leakage ratios; and providing a supply voltage to the power amplifier based on an envelope signal delayed according to the selected test delay value. For each of the plurality of test delay values, a corresponding adjacent channel leakage ratio is estimated based on a ratio of a magnitude of a component included in the test output signal and a magnitude of an inter-modulated component.

A method of manufacture and structure for a monolithic single chip single crystal device. The method can include forming a first single crystal epitaxial layer overlying the substrate and forming one or more second single crystal epitaxial layers overlying the first single crystal epitaxial layer. The first single crystal epitaxial layer and the one or more second single crystal epitaxial layers can be processed to form one or more active or passive device components. Through this process, the resulting device includes a monolithic epitaxial stack integrating multiple circuit functions.

Components of a power amplifier controller may support lower voltages than the power amplifier itself. As a result, a surge protection circuit that prevents a power amplifier from being damaged due to a power surge may not effectively protect the power amplifier controller. Embodiments disclosed herein present an overvoltage protection circuit that prevents a charge-pump from providing a voltage to a power amplifier controller during a detected surge event. By separately detecting and preventing a voltage from being provided to the power amplifier controller during a surge event, the power amplifier controller can be protected regardless of whether the surge event results in a voltage that may damage the power amplifier. Further, embodiments of the overvoltage protection circuit can prevent a surge voltage from being provided to a power amplifier operating in 2G mode.

A package or a chip including a linear amplifier and a power amplifier is provided, wherein the linear amplifier is configured to receive an envelope tracking signal to generate an amplified envelope tracking signal, the power amplifier is supplied by an envelope tracking supply voltage comprising a DC supply voltage and the amplified envelope tracking signal, and the power amplifier is configured to receive an input signal to generate an output signal.

A filter device configured to directly connect to a differential power amplifier of a transmit chain circuit. The filter device may include a transformer and a filter configured as a half lattice equivalent topology and having a single-ended output. The filter may be a lattice filter configured as a full lattice topology or a lattice equivalent filter configured as a half lattice equivalent topology. The filter includes a first branch having a first impedance network of one or more first impedance elements and a second branch having a second impedance network of one or more second impedance elements. The single-ended output of the filter device may connect to an antenna switch that is in turn connected to an antenna.

An apparatus for canceling an input offset of a receiver including a differential amplification unit and a differential comparison unit in a distance sensing system includes: an output monitoring unit selectively monitoring differential outputs of the differential comparison unit and the differential amplification unit; a current type digital-analog conversion unit connected to each of an input terminal of the differential comparison unit and the input terminal of the differential amplification unit; and a control unit controlling the current type digital-analog conversion unit to reduce a difference in differential output of the differential comparison unit according to a comparison result for the difference of the monitored differential output of the differential comparison unit and controlling the current type digital-analog conversion unit to reduce the difference in differential output of the differential amplification unit according to the comparison result for the difference of the monitored differential output of the differential amplification unit.

A radio frequency (RF) transistor amplifier package includes a submount, and first and second leads extending from a first side of the submount. The first and second leads are configured to provide RF signal connections to one or more transistor dies on a surface of the submount. At least one rivet is attached to the surface of the submount between the first and second leads on the first side. One or more corners of the first side of the submount may be free of rivets. Related devices and associated RF leads and non-RF leads are also discussed.

An apparatus is disclosed for bidirectional amplification with phase-shifting. In example implementations, an apparatus includes a phase shifter with a bidirectional amplifier. The bidirectional amplifier includes a first transistor coupled between a first plus node and a second minus node, a second transistor coupled between a first minus node and a second plus node, a third transistor coupled between the first plus node and the second minus node, and a fourth transistor coupled between the first minus node and the second plus node. The bidirectional amplifier also includes a fifth transistor coupled between the first plus node and the second plus node, a sixth transistor coupled between the first minus node and the second minus node, a seventh transistor coupled between the first plus node and the second plus node, and an eighth transistor coupled between the first minus node and the second minus node.

An impedance matching circuit includes a radiofrequency terminal and a series circuit connected to the radiofrequency terminal, wherein the series circuit comprises at least one reactance and at least one switching element having a drive input. A drive circuit is connected to the drive input and a coupler is connected to the drive circuit so as to an enable signal input. The impedance matching circuit enables short switching times and low losses in the at least one switching element.