Bias circuits for CMOS power amplifiers are provided. The bias circuit includes a feedback module, a first bias module, and a second bias module. The feedback module has a first input connected to a output common mode voltage, a second input connected to a reference voltage, and an output connected to gates of main amplification transistors in a first differential amplification module; based on a difference between the output common mode voltage and the reference voltage, the feedback module adjusts gate voltages of main amplification transistors until the output common mode voltage is equal to the reference voltage; the first bias module provides bias voltages for the first differential amplification module; the second bias module provides bias voltages for a second differential amplification module. The present disclosure adopts direct negative feedback and cascoded current mirrors, which realize accurate DC gate bias and accurate control of the output common mode voltage.

The present disclosure relates to a radio frequency power amplifier system (200) comprising a first (114) and a second input port (121). The radio frequency power amplifier system (200) comprises a main amplifier (101) having an input (107) and an output (108) and a first (102) and a second auxiliary amplifier (122) having respective inputs (109, 129) and outputs (110, 128). The radio frequency power amplifier system (200) comprises an internal load (103) connected to the output (110) of the first auxiliary amplifier (102), a feedback network (104) having an input end (111) connected to the output (110) of the first auxiliary amplifier (102) and an output end (112) connected to the input (109) of the first auxiliary amplifier (102). The radio frequency power amplifier system (200) also comprises a feedforward amplifier (123) having an input (124) and an output (130). The inputs (107, 129, 109) of the main amplifier and the auxiliary amplifiers are interconnected with the first input port (114) at a common input node (113), the output (128) of the second auxiliary amplifier (122) and the second input port (121) are interconnected with the input (124) of the feedforward amplifier (123) at a common node (127) and the outputs (130,108) of the feedforward amplifier (123) and the main amplifier (101) are interconnected at a common output node (125). The main amplifier (101) is a replica of the first auxiliary amplifier (102) with an increased gain and the second auxiliary amplifier (122) is a replica of the first auxiliary amplifier (102).

A method for making a semiconductor device may include forming active circuitry on a substrate including differential transistor pairs, and forming threshold voltage test circuitry on the substrate. The threshold voltage test circuitry may include a pair of differential test transistors replicating the differential transistor pairs within the active circuitry, with each test transistor having a respective input and output, and at least one gain stage configured to amplify a difference between the outputs of the differential test transistors for measuring a threshold voltage thereof. The differential transistor pairs and the pair of differential test transistors each includes spaced apart source and drain regions, a channel region extending between the source and drain regions, and a gate overlying the channel region. Moreover, each of the channel regions may include a superlattice.

A bias circuit includes a replica circuit for an amplifier circuit using a cascode type inverter, and a generation circuit that generates a bias voltage that causes a drain voltage of an input stage transistor of the amplifier circuit to be a saturation drain voltage, based on an output voltage of the replica circuit, and supplies the generated bias voltage to a cascode element of the amplifier circuit and a cascode element of the replica circuit.

An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit standby current during operation in the standby mode while allowing a quick recovery to normal operating conditions of the amplifier. Biasing an input transistor of the stacked transistors can be obtained by using a replica stack circuit.

An integrated circuit includes: an amplifier circuit including a first inverter and a second inverter to amplify a voltage difference between a first line and a second line; a replica amplifier circuit including a first replica inverter having an input terminal and an output terminal which are coupled to a second replica line and replicating the first inverter, and that includes a second replica inverter having an input terminal and an output terminal which are coupled to a first replica line and replicating the second inverter; and a current control circuit suitable for controlling an amount of a current sourced to the replica amplifier circuit and an amount of a current sunken from the replica amplifier circuit based on comparison of an average level between a voltage of the first replica line and a voltage of the second replica line with a level of a target voltage.

A differential amplifier comprises: a long tailed pair transistor configuration comprising a differential pair of transistors and a tail transistor; and a replica circuit configured to vary a feedback current in the replica circuit to match a replica voltage to a reference voltage, wherein varying the feedback current in the replica circuit provides a bias voltage to the tail transistor in the long tailed pair which controls a tail current through the tail transistor to determine a common mode voltage in the long tailed pair.

An amplifier circuit includes: an input circuit configured to receive an input signal; a load circuit provided in series with the input circuit and including a first variable resistance unit and a second variable resistance unit, a resistance value of the first variable resistance unit being controlled by, a digital code, a resistance value of the second variable resistance unit being controlled by an analog control voltage; and a correction circuit including a third variable resistance unit having a circuit configuration corresponding to the first variable resistance unit and a fourth variable resistance unit having a circuit configuration corresponding to the second resistance unit, a resistance value of the third variable resistance unit being controlled by the digital code, a resistance value of the fourth variable resistance unit being controlled by the analog control voltage, the correction circuit being configured correct a resistance value of the load circuit.

Driver circuits, systems for driving actuators, and imaging systems with actuators. The driver circuit includes a current comparator circuit, a driver, and a replica circuit. The current comparator circuit includes a first node having a first voltage. The current comparator circuit also includes a second node having a second voltage. The driver includes a first terminal responsive to the second voltage. The driver also includes a second terminal connected to a reference voltage. The replica circuit includes a third terminal connected to the first node. The replica circuit also includes a fourth terminal connected to the second terminal of the driver. The replica circuit also includes a fifth terminal connected to the first terminal of the driver.