A method for a fast settling ripple reduction loop for high speed precision chopper amplifiers includes amplifying an input signal with a signal path to generate a first output, the signal path comprising chopping the input signal to generate a first chopper output, amplifying the first chopper output with an amplifier to generate an amplifier output and chopping the amplified output to generate a second chopper output. An output ripple of the first output is reduced with a Ripple Reduction Loop comprising chopping the second chopper output to generate a third chopper output, filtering the third chopper output with a filter to generate a Direct Current (DC) offset correction, and combining the DC offset correction with the amplifier output, wherein the third chopper output is driven to the output voltage of the filter and the RRL is disconnected from the low frequency signal path in response to a non-linear event.

Disclosed is an RF (Radio Frequency) power source having a power supply configured to convert an AC (Alternating Current) voltage at a power supply input to a second voltage at a power supply output, and an RF generator configured to receive the second voltage at an RF generator input and to use the second voltage to produce an output RF signal at an RF generator output. According to an embodiment of the disclosure, the power supply performs the voltage conversion without galvanic isolation between the power supply input and the power supply output, which can increase energy efficiency while reducing complexity and cost as well. Instead, the RF generator is provided with galvanic isolation between the RF generator input and the RF generator output, which can be sufficient for achieving galvanic isolation between the power supply input and the RF generator output for safety reasons.

A capacitive-coupled chopper instrumentation amplifier includes a first chopper, a first gain stage, a capacitive isolation stage electrically coupled between inputs of the first gain stage and the first chopper, a second gain stage, a second chopper electrically coupled between outputs of the first gain stage and inputs of the second gain stage, clamping circuitry electrically coupled between the inputs of the first gain stage and a reference voltage rail, and a controller. The controller is configured to (a) detect a change in a first common-mode voltage exceeding a threshold value, the first common-mode voltage being a common-mode voltage at the inputs of the amplifier, and (b) in response to detecting the change in the first common-mode voltage exceeding the threshold value, cause the clamping circuitry to clamp the inputs of the first gain stage to the reference voltage rail.

The present disclosure relates to chopper amplifier circuits featuring inherent chopper ripple suppression.

Disclosed is an RF (Radio Frequency) power source having a power supply configured to convert an AC (Alternating Current) voltage at a power supply input to a second voltage at a power supply output, and an RF generator configured to receive the second voltage at an RF generator input and to use the second voltage to produce an output RF signal at an RF generator output. According to an embodiment of the disclosure, the power supply performs the voltage conversion without galvanic isolation between the power supply input and the power supply output, which can increase energy efficiency while reducing complexity and cost as well. Instead, the RF generator is provided with galvanic isolation between the RF generator input and the RF generator output, which can be sufficient for achieving galvanic isolation between the power supply input and the RF generator output for safety reasons.

A class-D amplifier configured to adjust at least one input signal to at least one output signal. The class-D amplifier comprises: a loop filter, configured to receive the input signal; a PWM circuit, configured to generate at least one PWM signal; a summing circuit, coupled between an output of the loop filter and an input of the PWM circuit; an output circuit operating at a supply voltage, configured to generate the output signal responding to the PWM signal; and a supply voltage filter, configured to monitor the supply voltage to generate a filtered signal to the summing circuit. The summing circuit is configured to sum the output of the loop filter and the filtered signal to adjust a common-mode level of the input of the PWM circuit.

Systems and methods are provided for which a chopper modulator and a chopper demodulator of a chopped apparatus having a variable chopper frequency are described. A feedback path is used to reduce ripples and/or remaining offsets as a result of the variable chopper frequency.

The present disclosure relates to chopper amplifier circuits with inherent chopper ripple suppression. Example implementations can realize a doubly utilized chopper amplifier circuit that is a current-saving circuit with a wake-up function that is capable of providing a self-wake signal in order to change into a fast, low-jitter/low-latency mode, and to provide a wake-up signal for a sleeping microprocessor or a system in response to signal changes.

A circuit includes a transformer having a primary coil coupled to a first power amplifier (PA) and a second PA, and a secondary coil. The secondary coil supplies a current to an antenna based on a first direction of a first phase of a first amplified constant-envelope signal in the primary coil with respect to a second phase of a second amplified constant-envelope signal in the primary coil. The circuit further includes load impedance coupled between a median point of the primary coil and ground. The load impedance is adjusted to match one of an impedance of the differential antenna, an impedance of the first PA, and an impedance of the second PA, based on the ripples detected by the ripple detector.

The present disclosure relates to chopper amplifier circuits with inherent chopper ripple suppression. Example implementations can realize a doubly utilized chopper amplifier circuit that is a current-saving circuit with a wake-up function that is capable of providing a self-wake signal in order to change into a fast, low-jitter/low-latency mode, and to provide a wake-up signal for a sleeping microprocessor or a system in response to signal changes.