A self-biasing output booster amplifier having an input amplifier stage, an output amplifier stage being operatively connected to an output of the input amplifier stage, and first and second current copying circuits. The second current copying circuit is biased from an output of the self-biasing output booster amplifier. The first and second current copying circuits are configured to copy at least a portion of the current through the output amplifier stage. The sum of the output of the second current copying circuit and the output of the output amplifier stage provides the output current of the self-biasing output booster amplifier, Finally, the input amplifier stage is biased from the output of the second current copying.

A system for measuring high power currents, including: a low power transistor that is a scaled replica of a high power transistor of a high power driver; a regulator connected to the low power transistor, wherein the regulator is configured to regulate the current flowing through the low power transistor based upon a voltage sensed across the high power transistor and a chop signal; a current mirror with an input connected to the regulator and an output; a current detector having in input configured to receive the chop signal, wherein the current detector is connected to the output of the current mirror and wherein the current detector is configured to measure the current at the output of the current mirror to produce an estimate of the current flowing through the high power transistor.

A low-headroom current driver does not use an op amp or resistor. A sensing transistor having its source connected to a drain of an output transistor senses variations in an output current. The gate, source, and drain voltages of the sensing transistor are mirrored to a sense mirror transistor to control a sense current. The sense current is mirrored to a reference source transistor to generate a mirrored sense current. An error between the mirrored sense current and a fixed reference current is stored as charge on an error-storing capacitor. The stored error charge creates a negative-feedback compensation current that adjusts a gate voltage generated by a feedback-driving transistor. The adjusted gate voltage controls the gate of the output transistor to compensate for the sensed variation in output current. The sensing current is also compensated using a sense-mirror tail transistor connected to the sense mirror transistor.

To improve reading accuracy of a sense amplifier circuit and a semiconductor memory device. A sense amplifier circuit includes an N type FET which is a sensing transistor connected between a power supply and a ground via a data line that extends to a memory cell, a resistance element that is connected between a gate of the sensing transistor and the power supply, and a capacitance element that is connected between the gate of the sensing transistor and the ground.

A low-headroom current driver does not use an op amp or resistor. A sensing transistor having its source connected to a drain of an output transistor senses variations in an output current. The gate, source, and drain voltages of the sensing transistor are mirrored to a sense mirror transistor to control a sense current. The sense current is mirrored to a reference source transistor to generate a mirrored sense current. An error between the mirrored sense current and a fixed reference current is stored as charge on an error-storing capacitor. The stored error charge creates a negative-feedback compensation current that adjusts a gate voltage generated by a feedback-driving transistor. The adjusted gate voltage controls the gate of the output transistor to compensate for the sensed variation in output current. The sensing current is also compensated using a sense-mirror tail transistor connected to the sense mirror transistor.

Multi-stage amplifiers, such as linear regulators, provide a constant output voltage subject to load transients. The multi-stage amplifier includes a first amplification stage which activates or deactivates a first output stage in response to an input voltage at an input node. The first output stage sources a current at an output node of the multi-stage amplifier from a high potential, when activated. Furthermore, the multi-stage amplifier has a second amplification stage to activate or to deactivate a second output stage in response to the input voltage at the input node. The second output stage sinks a current at the output node of the multi-stage amplifier to a low potential, when activated. The first amplification stage and the second amplification stage activate the first output stage and the second output stage in a mutually exclusive manner.

A multi-stage amplifier, comprising a first amplifier stage is presented. The output of the first amplifier stage is coupled to a first terminal of a capacitor having a controllable capacitance. The input of a second amplifier stage is coupled to the output of the first amplifier stage and the first terminal of the capacitor. The output of the second amplifier stage is coupled to a second terminal of the capacitor and an output of the multi-stage amplifier. The input of a current sensing circuit is coupled with the output of the multi-stage amplifier. A control signal generator is coupled between the output of the current sensing circuit and a control terminal of the capacitor. The control signal generator provides a control signal to the capacitor in order to control or vary the capacitance of the capacitor.

A maximum current detection circuit with multiple input current ports and a maximum current port generates, on the maximum current port, a maximum current corresponding to the largest input current on one of the input current ports. The maximum current detection circuit includes multiple current mirror circuits, each controlled by one of the input currents. Each of the current mirror circuits includes outputs, each coupled to a respective one of the input current ports and the maximum current port. The current mirror circuit controlled by the largest input current becomes the dominant source for the input currents on each of the input current ports and also drives the maximum current on the maximum current port. The input currents may be single-ended or differential signals. The input currents may be respectively delayed signals of a windowing circuit in an envelope tracking circuit controlling a power amplifier of a wireless device.

According to one embodiment, a semiconductor device includes: a first circuit configured to drive a load couplable to a first terminal by supplying a load current to the load; and a third circuit including a second circuit configured to copy the load current based on a first voltage of the first terminal and output a first current obtained by copying the load current, the third circuit being configured to monitor a second current based on the first current. The third circuit further includes a fourth circuit configured to adjust the second current in a case where the load current is not supplied to the load.

A peak detector for a power amplifier is provided that includes a threshold voltage detector configured to pulse a detection current in response to an amplified output signal from the amplifier exceeding a peak threshold. A plurality of such peak detectors may be integrated with a corresponding plurality of power amplifiers in a transmitter. Should any peak detector assert an alarm signal or more than a threshold number of alarm signals during a given period, a controller reduces a gain for the plurality of power amplifiers.