Patent classifications
H03F2200/489
Cascode amplifier bias circuits
Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.
Optimized Multi Gain LNA Enabling Low Current and High Linearity Including Highly Linear Active Bypass
An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.
Amplifier circuit
An amplifier circuit (1) includes a FET (10) having a source terminal (S1), a drain terminal (D1), and a gate terminal (G1), a FET (20) having a source terminal (S2), a drain terminal (D2), and a gate terminal (G2) and coupled in parallel with the FET (10), a FET (30) having a source terminal (S3) coupled to the drain terminals (D1 and D2), a drain terminal (D3), and a gate terminal (G3) and cascoded with the FETs (10 and 20), and feedback circuits (21 and 22) configured to feed back to the gate terminal (G2) a high frequency signal outputted from the source terminal (S2) or the drain terminal (D2).
METHODS RELATED TO AMPLIFICATION OF RADIO-FREQUENCY SIGNALS
Methods related to amplification of radio-frequency signals. In some embodiments, a method for amplifying a radio-frequency signal can include configuring a gain stage to be in a selected one of a plurality of gain settings, with at least some of the gain settings resulting in different phases for the radio-frequency signal. The method can further include adjusting the phase of the radio-frequency signal for the selected gain setting, such that the adjusted phase is part of desired phases adjusted from the different phases.
High efficiency wideband feedback amplifier
According to an embodiment of the disclosure, a series or source feedback is provided to a solid-state power amplifier to achieve improved amplifier output power, good impedance match, and low voltage standing wave ratio (VSWR). In an embodiment, an inductive element is coupled to the source of the power amplifier transistor to serve as a series or source feedback for the transistor. In an embodiment, a high-impedance transmission line such as a microstrip or coplanar waveguide is provided as an inductive element coupled to the source of the transistor. In an embodiment, a series or source feedback is provided to each amplifier in a multistage amplifier circuit.
Configurable wideband split LNA
Methods and devices addressing design of wideband LNAs with gain modes are disclosed. The disclosed teachings can be used to reconfigure RF receiver front-end to operate in various applications imposing stringent and conflicting requirements. Wideband and narrowband input and output matching with gain modes using a combination of the same hardware and a switching network are also disclosed. The described methods and devices also address carrier aggregation requirements and provide solutions that can be used both in single-mode and split-mode operations.
Process of using a submerged combustion melter to produce hollow glass fiber or solid glass fiber having entrained bubbles, and burners and systems to make such fibers
Processes and systems for producing glass fibers having regions devoid of glass using submerged combustion melters, including feeding a vitrifiable feed material into a feed inlet of a melting zone of a melter vessel, and heating the vitrifiable material with at least one burner directing combustion products of an oxidant and a first fuel into the melting zone under a level of the molten material in the zone. One or more of the burners is configured to impart heat and turbulence to the molten material, producing a turbulent molten material comprising a plurality of bubbles suspended in the molten material, the bubbles comprising at least some of the combustion products, and optionally other gas species introduced by the burners. The molten material and bubbles are drawn through a bushing fluidly connected to a forehearth to produce a glass fiber comprising a plurality of interior regions substantially devoid of glass.
Variable-phase amplifier circuits and devices
Variable-phase amplifier circuits and devices. In some embodiments, an amplifier can include a variable-gain stage having a plurality of switchable amplification branches, with each being capable of being activated, such that a combination of one or more activated amplification branches provides respective gain level and phase shift. The plurality of switchable amplification branches can be configured such that the phase shift provided by each combination of one or more activated amplification branches compensates for a phase shift associated with the amplifier operating with the respective gain level of the variable-gain stage.
Amplifier Circuit
An amplifier circuit includes an input terminal used to receive an input signal, an output terminal used to output an output signal, an amplification unit, and a phase adjustment unit. The amplification unit includes an input terminal coupled to the input terminal of the amplifier circuit, an output terminal coupled to the output terminal of the amplifier circuit, a first terminal coupled to a first voltage terminal, and a second terminal coupled to a second voltage terminal. The phase adjustment unit is coupled to the amplification unit. When the amplifier circuit is operated in a first mode, the output signal has a first phase, and when the amplifier circuit is operated in a second mode, the output signal has a second phase. A difference between the first phase and the second phase is within a predetermined range.
LOW NOISE AMPLIFIER CIRCUIT
An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.