An amplifier includes a P-type transistor and an N-type transistor that are connected in series, an operation amplifier, a transformer, and a variable attenuator. In the operation amplifier, an output terminal is coupled to a gate side of one of the P-type transistor and the N-type transistor, one of an inverting input terminal and a non-inverting input terminal is coupled to drain sides of both of the P-type transistor and the N-type transistor, and a reference voltage is to be applied to the other of the inverting input terminal and the non-inverting input terminal. In the transformer, a primary coil is coupled to a source side of one of the P-type transistor and the N-type transistor. The variable attenuator is provided between a secondary coil and gate terminals of both of the N-type transistor and the P-type transistor.

Storage devices are capable of utilizing receiver devices with native devices configured to support lower voltage supplies for higher read performances. The receiver device may include a current source circuit, first and second stage circuits, and a duty cycle balancer circuit. The first stage circuit may utilize first and second native devices with a threshold voltage (VTH) that enables proper lower voltage operations in saturation at high speeds. The current source stage circuit may utilize a third native device to track a transconductance and provide a reference current that becomes proportional to VTH to maintain tighter gain across process, variation, and temperature (PVT). The second stage circuit may utilize a current folding stage to provide a high gain for faster conversion of intermediate signals. The duty cycle balancer may utilize a fourth native device to balance a rise and fall delay skew across the PVT to maintain tighter duty cycle.

Described examples include Ethernet physical layer (PHY) interface integrated circuits with transmit interface circuitry for transmitting data to an Ethernet network through a magnetic interface, which includes a voltage mode first amplifier with an output that generates a first voltage signal from a supply voltage according to a data input signal. The transmit interface circuit also includes a feedforward second amplifier circuit with an output stage that operates in a first mode to generate a current signal from the supply voltage according to the first voltage signal and to provide the current signal to the first amplifier output to boost a peak voltage at the output above the supply voltage to facilitate support for higher peak signal voltage swings for 10Base-T applications while using 2.5 volt or other low voltage supply levels.

An ultra-low power sub-threshold g.sub.m stage is disclosed where transconductance is very stable with process, temperature, and voltage variations. This technique can be implemented in a differential amplifier with constant gain and a second order biquad filter with constant cut off frequency. The amplifier gain can achieve a small temperature coefficient of 48.6 ppm/° C. and exhibits small sigma of 75 mdB with process. The second order biquad can achieve temperature stability of 69 ppm/° C. and a voltage coefficient of only 49 ppm/mV.

A wide voltage trans-impedance amplifier includes a first P-channel metal oxide semiconductor (PMOS) transistor PM1, a second PMOS transistor PM2, a third PMOS transistor PM3, a fourth PMOS transistor PM4, a fifth PMOS transistor PM5, a first bias voltage VB1, a second bias voltage VB2, a third bias voltage VB3, a first N-channel metal oxide semiconductor (NMOS) transistor NM1, and a second NMOS transistor NM2. A common-gate amplifier detects a change of an input voltage, and a negative feedback is constructed by injecting a current into a current mirror to achieve a low input impedance. The trans-impedance amplifier uses a common-gate amplifier to monitor an input voltage and uses a current mirror to perform the transconductance enhancement on an input transistor, while ensuring a relatively high loop gain.

A distributed amplifier with low supply voltage and low power consumption is provided. The distributed amplifier includes an input terminal inputting an input signal; an output terminal outputting an output signal; an amplifier unit; a gate line circuit connected to the input terminal, a first load circuit and the amplifier unit; a second load circuit; a drain line circuit connected to the second load circuit, the amplifier unit and the output terminal; and a bias voltage circuit connected between the drain line circuit and the output terminal, wherein the bias voltage circuit includes a voltage source; an inductor connected to the voltage source and a terminal of the drain line circuit; and a capacitor multiplier connected to the inductor, the drain line circuit and the output terminal.

An amplifier includes: a first input transistor connected to a first input, a first output, and a power source or a ground, a second input transistor connected to a second input, a second output, and the power source or the ground; a first replica transistor connected to the first input, a detection node, and the power source or the ground; a second replica transistor connected to the second input, the detection node, and the power source or the ground; and a bias transistor connected to a bias voltage, the detection node, and the power source or the ground.

An internal power supply for an amplifier is disclosed. The internal power supply floats according to a common mode voltage at the input to the amplifier and according to an input voltage at an input stage of the amplifier. Powering the input stage of the amplifier using the floating supply allows for the use of low voltage devices even when the range of possible common mode voltages includes high voltages. The use of low voltage devices can correspond to performance improvement for the amplifier and can help reduce the size of the amplifier. The internal supply can accommodate both positive and negative common mode voltages and can be used for current sense amplifiers of any gain.

A distributed amplifier with low supply voltage and low power consumption is provided. The distributed amplifier includes an input terminal inputting an input signal; an output terminal outputting an output signal; an amplifier unit; a gate line circuit connected to the input terminal, a first load circuit and the amplifier unit; a second load circuit; a drain line circuit connected to the second load circuit, the amplifier unit and the output terminal; and a bias voltage circuit connected between the drain line circuit and the output terminal, wherein the bias voltage circuit includes a voltage source; an inductor connected to the voltage source and a terminal of the drain line circuit; and a capacitor multiplier connected to the inductor, the drain line circuit and the output terminal.

An amplifier device includes an alternate current (AC) coupling circuit, an amplifier circuit, and a first bias circuit. The amplifier circuit is configured to amplify an input signal to generate an output signal, in which the amplifier circuit includes a first input terminal, and the first input terminal receives the input signal via the AC coupling circuit. The first bias circuit is configured to apply a first bias voltage to the first input terminal according to one of the output signal and a first voltage, such that the amplifier circuit amplifies the input signal to output the output signal.