Patent classifications
H03F2200/72
ROOM-TEMPERATURE SEMICONDUCTOR MASER AND APPLICATIONS THEREOF
A room-temperature semiconductor maser, including a first matching network, a second matching network, a heterojunction-containing transistor, and a resonant network. The output end of the first matching network is connected to the drain of the heterojunction-containing transistor. The input end of the second matching network is connected to the source of the heterojunction-containing transistor. The gate of the heterojunction-containing transistor is connected to the resonant network. The pumped microwaves are fed into the input end of the first matching network.
Transimpedance amplifiers for ultrasonic sensing applications
Various transimpedance amplifier (TIA) arrangements for ultrasonic front-end receivers used in ultrasonic sensing applications are disclosed. An example TIA includes three common-source gain stages in a feedback loop with a common-gate stage. In some aspects, the TIA may include a level shifter configured to maintain the voltage at the gate of a transistor used to implement the first common-source gain stage of the feedback loop shifted by a certain amount with respect to the voltage at an input port to the TIA. In some aspects, at least portions of the TIA may be biased using bias currents that are configured to be process-, supply voltage-, and/or temperature-dependent. Various embodiments of the TIAs disclosed herein may benefit from one or more of the following advantages: reduced noise, reduced input impedance, reduced temperature coefficient of input impedance, and stability for a wide range of sensor frequencies.
Complementary current field-effect transistor devices and amplifiers
The present invention relates to a novel and inventive compound device structure, enabling a charge-based approach that takes advantage of sub-threshold operation, for designing analog CMOS circuits. In particular, the present invention relates to a solid state device based on a complementary pair of n-type and p-type current field-effect transistors, each of which has two control ports, namely a low impedance port and gate control port, while a conventional solid state device has one control port, namely gate control port. This novel solid state device provides various improvement over the conventional devices.
Variable gain low noise amplifier with phase compensation
An apparatus includes an amplifying circuit configured to include stacked first and second transistors, and to amplify a signal input from an input terminal during an operation in an amplifying mode, and provide the amplified signal to an output terminal, and a negative feedback circuit comprising first to nth sub-negative feedback circuits, each corresponding to a separate gain mode included in the amplifying mode, wherein the negative feedback circuit is configured to provide a variable resistance value to determine a negative feedback gain based on each of the separate gain modes.
COMPLEMENTARY CURRENT FIELD-EFFECT TRANSISTOR DEVICES AND AMPLIFIERS
The present invention relates to a novel and inventive compound device structure, enabling a charge-based approach that takes advantage of sub-threshold operation, for designing analog CMOS circuits. In particular, the present invention relates to a solid state device based on a complementary pair of n-type and p-type current field-effect transistors, each of which has two control ports, namely a low impedance port and gate control port, while a conventional solid state device has one control port, namely gate control port. This novel solid state device provides various improvement over the conventional devices.
AMPLIFIER
An amplifier, including: an amplifying element, having a voltage input across a first terminal and a third terminal and a voltage controlled current path between a second terminal and the third terminal; and a trifilar transformer having a primary winding, a secondary winding and a tertiary winding; wherein the primary winding is connected to the third terminal, the secondary winding is connected to the first terminal and the tertiary winding is connected to the second terminal; wherein the primary winding and the secondary winding are mutually coupled in inverting relationship; wherein the primary winding and the tertiary winding are mutually coupled in non-inverting relationship; wherein the secondary winding and the tertiary winding are mutually coupled in inverting relationship; and wherein the tertiary winding is between the amplifier output and the second terminal.
SIGNAL RECEIVING CIRCUIT, SIGNAL PROCESSING CHIP, COMMUNICATIONS DEVICE, AND SIGNAL RECEIVING METHOD
A signal receiving circuit amplifies a radio frequency signal by using a first radio frequency amplifier, and outputs a first amplified signal in a same phase; amplifies the radio frequency signal by using a second radio frequency amplifier, and outputs a second amplified signal at an inverse phase. A first mixer mixes a first local oscillator signal with the first amplified signal to obtain a first frequency mixing signal; a second mixer mix a second local oscillator signal with the second amplified signal to obtain a second frequency mixing signal, where a phase of the first local oscillator signal is opposite to a phase of the second local oscillator signal; and after adding the first frequency mixing signal and the second frequency mixing signal, an output interface outputs the first frequency mixing signal and the second frequency mixing signal.
RF phase shifting device
A device for phase shifting is disclosed, comprising an input amplifier, a biasing circuit, a first output amplifier and a second output amplifier being variable-gain amplifiers, and a quadrature hybrid coupler. The input amplifier is connected to an input port of the coupler, the first output amplifier is connected to a through port of the coupler, the second output amplifier is connected to a coupled port of the coupler, and the biasing circuit is connected to an isolated port of the coupler. The device also includes, the quadrature hybrid coupler configured to receive, at the input port, an input signal from the input amplifier, output, at the through port, a through signal, receive, at the isolated port, a bias signal from the biasing circuit, and output, at the coupled port, a coupled signal having a phase differing from a phase of the through signal.
Device, system and method to mitigate signal noise in communications with a memory module
Techniques and mechanisms for mitigating signal deterioration in communications between two circuit boards. In an embodiment, a packaged device accommodates coupling to a first circuit board which, in turn, accommodates connection to a second circuit board. In one such embodiment, an amplifier circuit of the packaged device includes an amplifier circuit which comprises a variable resistor and an active circuit element coupled thereto. The device receives via one of the circuit boards a control signal and a voltage which configure the amplifier circuit to provide an impedance matching for communication between the circuit boards. In another embodiment, the device comprises multiple common gate amplifiers which are variously configurable each to provide a respective impedance matching for communications between a motherboard and a dual in-line memory module.
LARGE INPUT CURRENT DETECTION AND FAST RESPONSE OPTICAL RECEIVER
A clamp circuit can control a clamp transistor such that a change in a photodiode current detection voltage signal in an optical receiver circuit can control the clamp transistor to change state when a difference of a clamp voltage and the photodiode current detection voltage signal exceeds a threshold voltage of the clamp transistor. Using a feedback loop, the clamp circuit can accurately clamp a current when the photodiode current is larger than a detect current threshold.