We describe an integrated circuit is disclosed which can sense the drain voltage of an active heterojunction transistor under different conditions and can adjust a driving signal of a gate terminal of the active heterojunction transistor in order to limit conduction losses and/or switching losses.

Processes and systems for producing glass fibers having regions devoid of glass using submerged combustion melters, including feeding a vitrifiable feed material into a feed inlet of a melting zone of a melter vessel, and heating the vitrifiable material with at least one burner directing combustion products of an oxidant and a first fuel into the melting zone under a level of the molten material in the zone. One or more of the burners is configured to impart heat and turbulence to the molten material, producing a turbulent molten material comprising a plurality of bubbles suspended in the molten material, the bubbles comprising at least some of the combustion products, and optionally other gas species introduced by the burners. The molten material and bubbles are drawn through a bushing fluidly connected to a forehearth to produce a glass fiber comprising a plurality of interior regions substantially devoid of glass.

Methods and systems are described that include a differential amplifier driving an active load circuit, the active load circuit having a pair of load transistors and a high-frequency gain stage providing high frequency peaking for the active load circuit according to a frequency response characteristic determined in part by resistive values of a pair of active resistors connected, respectively, to gates of the pair of load transistors, and a bias circuit configured to stabilize the high frequency peaking of the high-frequency gain stage by generating a process-and-temperature variation (PVT)-dependent control voltage at gates of the active resistors to stabilize the resistive values of the pair of active resistors to account for PVT-dependent voltages at the gates of the pair of load transistors.

A power amplifier, for a transmitter circuit is disclosed, which comprises at least one field-effect transistor having a gate terminal and a bulk terminal. The at least one field-effect transistor is configured to receive an input voltage at the gate terminal and a dynamic bias voltage at the bulk terminal. The power amplifier comprises a bias-voltage generation circuit configured to generate the dynamic bias voltage as a nonlinear function of an envelope of input signal. The input voltage is a linear function of the input signal. The bias-voltage generation circuit comprises a rectifier circuit configured to generate a rectified input voltage and an amplifier circuit, operatively connected to the rectifier circuit, configured to generate the dynamic bias voltage based on the rectified input voltage. The amplifier circuit is a variable-gain amplifier circuit and the power amplifier comprises a control circuit configured to tune the gain of the amplifier circuit.

A calibration apparatus is used for calibrating characteristics of a power amplifier (PA) in a transmitter. The calibration apparatus includes an adaptive bias generator circuit that is used to track an envelope of an input signal received by control terminals of transistors of the PA and generate an adaptive bias voltage to the control terminals of the input transistors in response to the envelope of the input signal.

The disclosed technology provides a system for transmitting wireless power for charging electronic devices, e.g., smartphones, medical appliances, industrial equipment, and robotics. Some embodiments include parallel tuned resonant LC networks, load networks, and impedance matching networks for Class D and E, single-ended or differential, amplifier topologies for wireless power transfer in resonant inductive systems.

An amplifier circuit includes an input terminal used to receive an input signal, an output terminal used to output an output signal, an amplification unit, and a phase adjustment unit. The amplification unit includes an input terminal coupled to the input terminal of the amplifier circuit, an output terminal coupled to the output terminal of the amplifier circuit, a first terminal coupled to a first voltage terminal, and a second terminal coupled to a second voltage terminal. The phase adjustment unit is coupled to the amplification unit. When the amplifier circuit is operated in a first mode, the output signal has a first phase, and when the amplifier circuit is operated in a second mode, the output signal has a second phase. A difference between the first phase and the second phase is within a predetermined range.

A multiple-stage amplifier includes a driver stage die and a final stage die. The driver stage die includes a first type of semiconductor substrate (e.g., a silicon substrate), a first transistor, and an integrated portion of an interstage impedance matching circuit. A control terminal of the first transistor is electrically coupled to an RF signal input terminal of the driver stage die, and the integrated portion of the interstage impedance matching circuit is electrically coupled between a current-carrying terminal of the first transistor and an RF signal output terminal of the driver stage die. The second die includes a III-V semiconductor substrate (e.g., a GaN substrate) and a second transistor. A connection, which is a non-integrated portion of the interstage impedance matching circuit, is electrically coupled between the RF signal output terminal of the driver stage die and an RF signal input terminal of the final stage die.

A field-effect transistor system is provided that comprises a field-effect transistor having a back-gate terminal that can be adjusted by a back-gate voltage, a gate-source voltage and a drain-source voltage additionally being present at the field-effect transistor, and a drain current flowing through the field-effect transistor. In addition, the field-effect transistor system includes a control unit connected to the back-gate terminal, which unit is set up to set the drain current flowing through the field-effect transistor to a setpoint current via a controlling of the back-gate voltage at the back-gate terminal, the controlling of the back-gate voltage taking place as a function of at least the gate-source voltage. In addition, a method is provided for setting a drain current of a field-effect transistor.

A transistor stack can include a combination of floating and body tied devices. Improved performance of the RF amplifier can be obtained by using a single body tied device as the input transistor of the stack, or as the output transistor of the stack, while other transistors of the stack are floating transistors. Transient response of the RF amplifier can be improved by using all body tied devices in the stack.