H03F2200/78

Amplifier with a controllable pull-down capability for a memory device
11632084 · 2023-04-18 · ·

Methods, systems, and devices for operating an amplifier with a controllable pull-down capability are described. A memory device may include a memory array and a power circuit that generates an internal signal for components in the memory array. The power circuit may include an amplifier and a power transistor that is coupled with the amplifier. A pull-down capability of the amplifier may be controllable using an external signal that is based on a difference between a reference signal and the internal signal. The power circuit may also include a comparator that is coupled with the amplifier and configured to compare the reference signal and the internal signal. Components of the comparator may be integrated with components of the amplifier, may share a bias circuit, and may use nodes within the amplifier to control the comparator. A signal output by the comparator may control the pull-down capability of the amplifier.

Cascode amplifier bias circuits

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

PROTECTION CIRCUIT IN ELECTRONIC DEVICE AND METHOD THEREFOR

An electronic device and method thereof of are provided to prevent burnout due to overcurrent. An electronic device includes a power amplifier configured to amplify a transmission signal; a battery configured to provide a bias voltage to the at least one power amplifier; and an overcurrent protection circuit configured to prevent overcurrent from flowing through the power amplifier. The overcurrent protection circuit includes a configurer configured to configure a reference current value, based on the power amplifier; a measurer configured to measure a bias current value due to the bias voltage; a comparator configured to compare the measured bias current value with the reference current value; and a controller configured to recognize overcurrent flowing through the power amplifier and control provision of the bias voltage, based on a result of the comparison.

Circuit employing MOSFETs and corresponding method

A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.

Signal processor and method
11646659 · 2023-05-09 · ·

A signal processor and method. The signal processor includes a signal current path. The signal processor includes a transconductor. The transconductor has an input operable to receive an input voltage of the signal processor. The transconductor also has an output operable to output a current based on the input voltage. The signal processor also includes a processing stage coupled to the output of the transconductor to receive and process the current outputted by the transconductor. The signal processor further includes a current replicator operable to generate a replica current proportional to the current outputted by the transconductor. The signal processor also includes a comparator operable to compare an output of the current replicator with a reference. The signal processor further includes a current limiter operable to limit the current outputted by the transconductor based on the comparison of the output of the current replicator with the reference.

CIRCUITS AND OPERATING METHODS THEREOF FOR MONITORING AND PROTECTING A DEVICE

Circuits for protecting devices, such as gallium nitride (GaN) devices, and operating methods thereof are described. The circuits monitor a magnitude of the current in a device and reduce the magnitude of the current and/or shut down the device responsive to the magnitude of the current exceeding a threshold. These circuits safeguard devices from damaging operating conditions to prolong the operating life of the protected devices.

CIRCUITS AND OPERATING METHODS THEREOF FOR MONITORING AND PROTECTING A DEVICE

Circuits for protecting devices, such as gallium nitride (VcclGaN) devices, and operating methods thereof are described. The circuits monitor a magnitude of the current in a device and reduce the magnitude of the current and/or shut down the device responsive to the magnitude of the current exceeding a threshold. These circuits safeguard devices from damaging operating conditions to prolong the operating life of the protected devices.

AUDIO SIGNAL MODULATION AND AMPLIFICATION CIRCUIT

An audio signal modulation and amplification circuit includes a common-mode electric potential controller, a carrier generator, and channel circuits. The common-mode electric potential controller is configured to generate one or more first common-mode electric potentials and second common-mode electric potentials. The carrier generator is adapted to receive the first common-mode electric potential to generate a carrier signal. Each of the channel circuits includes a filter, a comparison circuit, and a driving circuit. The filter is adapted to filter an input signal and generate a filtered signal based on a corresponding one of the second common-mode electric potentials. The comparison circuit is configured to compare the potential of the carrier signal with the potential of the filtered signal to generate a pulse-width modulation signal. The driving circuit is configured to be turned on or off in response to the pulse-width modulation signal to output a load driving signal.

Transimpedance circuit
09837969 · 2017-12-05 · ·

According to one embodiment, a transimpedance circuit includes: a transimpedance amplifier that converts a current signal into a voltage signal, a reference voltage generating circuit that generates a reference voltage signal, and a comparator that generates a pulse signal corresponding to the current signal in accordance with a voltage level of the voltage signal and a voltage level of the reference voltage signal. The transimpedance amplifier includes a first transistor that amplifies the current signal, a voltage converter that converts the current signal into a voltage signal, and a bypass circuit that allows the current signal to be bypassed when the current signal which flows through a control terminal of the first transistor exceeds a predetermined value.

Lower-skew receiver circuit with RF immunity for controller area network (CAN)

A circuit (e.g., implemented as part of a controller area network (CAN) bus receiver includes a pre-amplifier stage having first and second outputs. The circuit also includes a comparator having first and second inputs. The first input is coupled to the first output of the pre-amplifier stage, and the second input is coupled to the second output of the pre-amplifier stage. The comparator includes an input differential transistor pair, a second pair of transistors coupled to the input differential transistor pair in a cascode configuration, and a push-pull output stage coupled to the second pair of transistors.