An OTA circuit includes a first input stage that includes a first pair of transistors having sources coupled to a reference potential and converts a differential input voltage input to gates of the first pair of transistors into a first control current, a second input stage that includes a second pair of transistors having sources coupled to the reference potential and converts the differential input voltage input to gates of the second pair of transistors into a second control current, a first output circuit that generates one output current out of the differential output currents in accordance with the first control current, and a second output circuit that generates the other output current out of the differential output currents in accordance with the second control current.

An integrated circuit includes a degeneration network configured to improve group delay across one or more variations, wherein the degeneration network includes a transimpedance amplifier with one or more degeneration inductors. The transimpedance amplifier further includes one or more transistors, and the one or more degeneration inductors are connected after at least one emitter of the one or more transistors.

An integrated circuit includes a degeneration network configured to improve group delay across one or more variations, wherein the degeneration network includes a transimpedance amplifier with one or more degeneration inductors. The transimpedance amplifier further includes one or more transistors, and the one or more degeneration inductors are connected after at least one emitter of the one or more transistors.

A low-dropout voltage regulator (2) comprises: a differential amplifier portion (4) including a first amplifier input connected to a reference voltage (16), a second amplifier input, and a differential output which is determined by a difference between the reference voltage and a voltage on the second amplifier input; an output portion (10) arranged to provide a regulator output voltage (62) which is controlled by the differential output of the amplifier portion, the second amplifier input being connected to or derived from (70) the regulator output voltage; and a biasing portion (8) arranged to measure an external load current and to provide a biasing current to the differential amplifier portion which depends on the load current.

An integrated circuit includes a degeneration network configured to improve group delay across one or more variations, wherein the degeneration network includes a transimpedance amplifier with one or more degeneration inductors. The transimpedance amplifier further includes one or more transistors, and the one or more degeneration inductors are connected after at least one emitter of the one or more transistors.

A differential amplifier has an inherent offset voltage. In many circuit applications, such as with a voltage to current converter circuit, it is important to nullify that offset voltage. A calibration circuit is provided to configured the differential amplifier to operate as a comparator with a common voltage applied to both inputs. The logic state of the output of the amplifier indicates whether the offset voltage is positive or negative. In response thereto, a trim current with a progressively increasing magnitude is injected into the amplifier and the amplifier output is monitored to detect a change in logic state. The magnitude of the trim current at the point where the logic state changes is the magnitude of trim current needed to nullify the voltage offset.

A radio circuit, comprises an antenna; a differential power amplifier, comprising differential transmit inputs and differential transmit outputs, configured to amplify differential transmit signals received via the differential transmit inputs and output the amplified differential transmit signals via the differential transmit outputs; a differential low noise amplifier, comprising differential receive inputs and differential receive outputs, configured to receive differential receive signals via the differential receive inputs and output amplified differential receive signals via the differential receive outputs; and a transformer comprising a primary winding and a secondary winding, the primary winding coupled with the differential transmit outputs of the power amplifier and the differential receive inputs of the low noise amplifier and the secondary winding coupled with the antenna.

The present disclosure provides a detailed description of techniques for implementing a linear amplifier with extended linear output range. More specifically, the present disclosure discloses techniques for extending the output signal range of a linear amplifier with a minimum increase in power consumption and die area consumption. Some embodiments facilitate coupling boost amplifiers with adjustable independent biasing to a main amplifier to boost the output signal near the non-linear regions of the transfer curve to extend the linear range. Certain embodiments comprise a first boost amplifier biased to contribute to the output signal when the input signal is near a negative threshold voltage, and a second boost amplifier biased to contribute to the output signal when the input signal is near a positive threshold voltage. In certain embodiments, the threshold voltages and/or the bias currents can be controlled to adjust certain amplifier attributes.

An integrated circuit includes a degeneration network configured to improve group delay across one or more variations, wherein the degeneration network includes a transimpedance amplifier with one or more degeneration inductors. The transimpedance amplifier further includes one or more transistors, and the one or more degeneration inductors are connected after at least one emitter of the one or more transistors.

In an embodiment, a differential buffer includes: first and second input terminals configured to receive a differential input voltage; first and second output terminals configured to provide a differential output voltage; a differential source follower amplifier having first and second inputs respectively coupled to the first and second input terminals, and first and second outputs respectively coupled to the first and second output terminals; and a differential common source amplifier having first and second inputs respectively coupled to the second and first output terminals via a first pair of capacitors, and first and second outputs respectively coupled to the first and second output terminals.