Certain aspects of the present disclosure generally relate to a multi-output amplifier implemented using a capacitive attenuator. For example, the multi-output amplifier generally includes a first capacitive attenuator coupled to an input node of the multi-output amplifier. In certain aspects, the multi-output amplifier also includes a first amplification stage having an input coupled to a tap node of the first capacitive attenuator and an output coupled to a first output node of the multi-output amplifier, and a second amplification stage having an output coupled to a second output node of the multi-output amplifier. For certain aspects, the multi-output amplifier includes a second capacitive attenuator coupled to the input node of the multi-output amplifier, and the second amplification stage may have an input coupled to a tap node of the second capacitive attenuator.

Certain aspects of the present disclosure generally relate to a multi-output amplifier implemented using a capacitive attenuator. For example, the multi-output amplifier generally includes a first capacitive attenuator coupled to an input node of the multi-output amplifier. In certain aspects, the multi-output amplifier also includes a first amplification stage having an input coupled to a tap node of the first capacitive attenuator and an output coupled to a first output node of the multi-output amplifier, and a second amplification stage having an output coupled to a second output node of the multi-output amplifier. For certain aspects, the multi-output amplifier includes a second capacitive attenuator coupled to the input node of the multi-output amplifier, and the second amplification stage may have an input coupled to a tap node of the second capacitive attenuator.

An active device and circuits utilized therewith are disclosed. In an aspect, the active device comprises an n-type transistor having a drain, gate and bulk and a p-type transistor having a drain, gate and bulk. The n-type transistor and the p-type transistor include a common source. The device includes a first capacitor coupled between the gate of the n-type transistor and the gate of the p-type transistor, a second capacitor coupled between the drain of the n-type transistor and the drain of p-type transistor and a third capacitor coupled between the bulk of the n-type transistor and the bulk of p-type transistor. The active device has a high breakdown voltage, is memory less and traps even harmonic signals.

An apparatus for controlling the gain and phase of an input signal input to a power amplifier comprises a gain control loop configured to control the gain of the input signal based on power levels of the input signal and an amplified signal output by the power amplifier, to obtain a predetermined gain of the amplified signal, and a phase control loop configured to obtain an error signal related to a phase difference between a first signal derived from the input and a second signal derived from the amplified signal, and control the phase based on the error signal, to obtain a predetermined phase of the amplified signal. The phase control loop delays the first signal such that the delayed first signal and the second signal used to obtain the error signal correspond to the same part of the input signal. The apparatus may be included in a satellite.

In an incore nuclear instrumentation system which is equipped with a movable type neutron detector, an object of the invention is to control measurement errors due to the degradation of the system. The incore nuclear instrumentation system includes a neutron detector which is to be installed in a nuclear reactor stored in a containment vessel, and an instrumentation unit which has a current detector circuit and is to be installed on the outside of the containment vessel. An output signal of the neutron detector is inputted into the current detector circuit, and the instrumentation unit remembers a matrix which shows a relation among a reactor power of the nuclear reactor, a gain of the current detector circuit, and an output voltage Vn of the current detector circuit, and the calibration of the current detector circuit is performed with reference to the matrix.

An active device and circuits utilized therewith are disclosed. In an aspect, the active device comprises an n-type transistor having a drain, gate and bulk and a p-type transistor having a drain, gate and bulk. The n-type transistor and the p-type transistor include a common source. The device includes a first capacitor coupled between the gate of the n-type transistor and the gate of the p-type transistor, a second capacitor coupled between the drain of the n-type transistor and the drain of p-type transistor and a third capacitor coupled between the bulk of the n-type transistor and the bulk of p-type transistor. The active device has a high breakdown voltage, is memory less and traps even harmonic signals.

At least one method, apparatus and system disclosed involves providing semiconductor device having transistors comprising back gates and front gates. The semiconductor device comprises a signal processing unit for processing an input signal to provide an output signal. The signal processing unit includes a first transistor and a second transistor. The first transistor includes a first back gate electrically coupled to a first front gate. The signal processing unit also includes a second transistor operatively coupled to the first transistor. The second transistor includes a second back gate electrically coupled to a second front gate. The semiconductor device also includes a gain circuit for providing a gain upon the output signal. The semiconductor device also includes a bias circuit to provide a first bias signal to the first back gate and a second bias signal to the second back gate.

Embodiments include systems, methods, and apparatuses for providing a dimming function in a single stage AC input light emitting diode (LED) driver with a controller that contains an on-chip error amplifier and an on-chip fixed reference voltage source coupled to a first input of the error amplifier. The controller controls a duty cycle of a switching transistor to cause a feedback voltage, applied to a first package input terminal, to match the reference voltage. To achieve a dimming function, a voltage across a current sense resistor in series with the LEDs is applied to a first input of a high gain differential amplifier, and a variable dimming control voltage is applied to a second input of the differential amplifier. The output of the differential amplifier is coupled to the first package input terminal. The differential amplifier input signals will be matched at the target LED current level.

A variable-gain power amplifying technique includes generating, with a network of one or more reactive components included in an oscillator, a first oscillating signal, and outputting, via one or more taps included in the network of the reactive components, a second oscillating signal. The second oscillating signal has a magnitude that is proportional to and less than the first oscillating signal. The power amplifying technique further includes selecting one of the first and second oscillating signals to use for generating a power-amplified output signal, and amplifying the selected one of the first and second oscillating signals to generate the power-amplified output signal.

An apparatus for controlling the gain and phase of an input signal input to a power amplifier comprises a gain control loop configured to control the gain of the input signal based on power levels of the input signal and an amplified signal output by the power amplifier, to obtain a predetermined gain of the amplified signal, and a phase control loop configured to obtain an error signal related to a phase difference between a first signal derived from the input and a second signal derived from the amplified signal, and control the phase based on the error signal, to obtain a predetermined phase of the amplified signal. The phase control loop delays the first signal such that the delayed first signal and the second signal used to obtain the error signal correspond to the same part of the input signal. The apparatus may be included in a satellite.