A circuit includes an operational amplifier and a resistor network coupled to an output of the operational amplifier. The resistor network includes a first set of resistors coupled between the output of the operational amplifier and a first node of the resistor network, wherein the resistors of the first set are electrically connected in series with each other, a second set of resistors coupled between the first node and a second node of the resistor network, wherein the resistors of the second set are electrically connected in series with each other and include a first number of resistors, a third set of resistors coupled between the second node and a third node of the resistor network, wherein the third node is coupled to a first voltage, and wherein the resistors of the third set are electrically connected in parallel with each other and include a second number of resistors, and a resistor coupled between the first node and the second node and arranged in parallel with the second set of resistors.

A receiver front-end includes a first variable-gain amplifier that performs attenuation; a continuous time linear equalizer coupled to the input or output of the first variable-gain amplifier, wherein a combination of the first variable-gain amplifier and the continuous time linear equalizer produces a processed signal; a plurality of track-and-hold circuits that sample the processed signal in an interleaved manner; and a plurality of second variable-gain amplifiers receiving input signals from the plurality of track-and-hold circuits respectively.

A method includes receiving first data associated with a first power amplifier and second data associated with a second power amplifier. The method also includes generating a first amplitude limiting signal having gain parameters that are based on the first data and the second data. The first data includes at least one of a temperature measurement associated with the first power amplifier, a supply voltage measurement associated with the first power amplifier, a load resistance associated with the first power amplifier, or a gain associated with the first power amplifier. The method further includes modifying an audio signal based at least in part on the first amplitude limiting signal to generate a first gain-adjusted audio signal. The method also includes providing a first output audio signal to the first power amplifier for amplification. The first output audio signal is based at least in part on the first gain-adjusted audio signal.

A digitally controlled variable gain amplifier (VGA) for generating amplification output levels is disclosed. In one aspect, the digitally controlled VGA includes a positive amplification stage including at least two positive amplifiers, and a corresponding negative amplification stage coupled to the positive amplification stage. The negative amplification stage includes at least two negative amplifiers. The positive amplification stage and the corresponding negative amplification stage are digitally controlled by one or more digital codes. The corresponding negative amplification stage is coupled in parallel with the positive amplification stage and is equally weighted as the positive amplification stage, and both the positive amplification stage and the corresponding negative amplification stage selectively contribute to the generation of the amplification output levels for the digitally controlled VGA.

According to one embodiment, a semiconductor device includes the following configuration. A detection circuit detects a state of a clock signal. An amplification circuit changes a gain based on the state of the clock signal detected by the detection circuit. An amplification circuit amplifies a first voltage with the gain and outputs a second voltage obtained as a result of amplification. A conversion circuit converts the second voltage output from the amplification circuit to first data. An isolation circuit includes a driver and a receiver electrically isolated from the driver. The driver transmits a signal corresponding to the first data to the receiver. The receiver outputs second data corresponding to the signal transmitted from the driver. The output circuit outputs the second data output from the isolation circuit.

An amplitude detector has a phase shifter such as one using an analog differentiator and an adjustable gain stage, or one using a determinable delay, the phase shifter coupled to shift phase of an input signal to the amplitude detection apparatus. The detector also has a first analog multiplier coupled to square the input signal, a second analog multiplier coupled to square output of the phase shifter; and an analog adder coupled to sum outputs of the first and second analog multiplier. An automatic gain control circuit has the amplitude detector coupled to control gain of a controllable amplifier.

Methods and devices used in mobile receiver front end to support multiple paths and multiple frequency bands are described. The presented devices and methods provide benefits of scalability, frequency band agility, as well as size reduction by using one low noise amplifier per simultaneous outputs. Based on the disclosed teachings, variable gain amplification of multiband signals is also presented.

Distributed amplifier systems and methods are disclosed. An example distributed amplifier system includes first stage traveling wave amplifier (TWA) circuitry that is controllable to provide one of a first set of discrete gain settings. The first stage TWA circuitry includes a first input transmission line, a first output transmission line, and a first plurality of amplifiers coupled antiparallel between the first input transmission line and the first output transmission line. The first set of discrete gain settings has approximately constant logarithmic spacing.

A technology related to a power amplifier used in a wireless communication circuit is disclosed. A radio frequency (RF) power amplifier includes a plurality of unit differential amplifiers of which inputs are connected to a common input terminal and outputs are connected to a common adder, and having a gain of a weight of a corresponding bit of a binary gain control word. Each of the differential amplifiers may be configured as a complementary metal-oxide semiconductor (CMOS) differential cascode amplifier. In addition, the RF power amplifier may include a structure in which a plurality of attenuators of the same structure are cascade-connected so that an attenuation rate may be linearly and digitally controlled and an output of each attenuator is connected to an output adder through differential buffers of which turn-on and turn-off are controlled by a controller.

An audio playback path of an audio apparatus includes a digital modulator, a digital-to-analog converter (DAC), and a power amplifier. The digital modulator receives a playback signal corresponding to playback audio content and generates a digital input signal in accordance with the playback signal. The DAC receives the audio input signal and generates an analog preamplifier signal. The power amplifier generates an audio output signal in accordance with the preamplifier signal and an analog attenuation determined by the analog attenuation signal. The apparatus may include a volume control input to receive a volume control signal and a playback controller configured to perform operations including generating an analog attenuation signal in accordance with the volume control signal, monitoring a playback state indicated by the playback parameters, and responsive to detecting the playback state satisfying the playback criterion, modifying a selected playback parameter to improve a performance parameter of the playback path.