Patent classifications
H03G11/02
MONOLITHIC MULTI-I REGION DIODE LIMITERS
A number of monolithic diode limiter semiconductor structures are described. The diode limiters can include a hybrid arrangement of diodes with different intrinsic regions, all formed over the same semiconductor substrate. In one example, a method of manufacture of a monolithic diode limiter includes providing an N-type semiconductor substrate, providing an intrinsic layer on the N-type semiconductor substrate, implanting a first P-type region to a first depth into the intrinsic layer, implanting a second P-type region to a second depth into the intrinsic layer, and forming at least one passive circuit element over the intrinsic layer. The method can also include forming an insulating layer on the intrinsic layer, forming a first opening in the insulating layer, and forming a second opening in the insulating layer. The method can also include implanting the first P-type region through the first opening and implanting the second P-type region through the second opening.
Method and apparatus to optimize power clamping
A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
Switchable clamps across attenuators
Methods and devices for limiting the power level of low noise amplifiers (LNA) implemented in radio frequency (RF) receiver front-ends. The described methods are applicable to bypass, low and high gain modes of the LNA. According to the described methods, the decoder allows the signal to be clamped before or after being attenuated. The benefit of such methods is to improve large signal performances (e.g. IIP3, P1dB) of the RF receiver front-end, while still meeting the clamping requirements, or improve (lower) clamped output power, while still meeting large signal performances (e.g. IIP3, P1dB).
Apparatus and methods for radio frequency signal limiting
Apparatus and methods for radio frequency (RF) signal limiting are provided. In certain embodiments, an RF signal limiting system includes a cascade of a front limiter and a biased limiter. Additionally, the front limiter provides an initial amount of limiting to an RF signal, while the biased limiter serves to further limit the RF signal. The biased limiter is adaptively biased such that the amount of limiting provided to the RF signal increases in response to an increase in the RF signal level. Such an RF signal limiting system can be used in a variety of applications, including protecting an input of a low noise amplifier (LNA).
RF Power Amplifier Performance by Clipping Prevention of Large PAPR Signals
Preventing RF signal distortion and signal error producing memory events in a Radio Frequency (RF) power amplifier (RFPA). An element, disposed prior to the Radio Frequency (RF) power amplifier (RFPA) in a signal path of a RF signal input to the RFPA, may enforce a maximum allowable amplitude in a high PAPR instantaneous high peak of the RF signal. An element may also increase or supplement a bias of the Radio Frequency (RF) power amplifier (RFPA) when a high PAPR instantaneous high peak is detected in the RF signal prior to receipt by the RFPA. Additionally, a first element operable detects when an instantaneous output voltage of the Radio Frequency (RF) power amplifier (RFPA) is below a predetermined voltage, and in response, a second element supplies additional current to prevent the output voltage of the RFPA from falling below a predetermined threshold voltage.
RF Power Amplifier Performance by Clipping Prevention of Large PAPR Signals
Preventing RF signal distortion and signal error producing memory events in a Radio Frequency (RF) power amplifier (RFPA). An element, disposed prior to the Radio Frequency (RF) power amplifier (RFPA) in a signal path of a RF signal input to the RFPA, may enforce a maximum allowable amplitude in a high PAPR instantaneous high peak of the RF signal. An element may also increase or supplement a bias of the Radio Frequency (RF) power amplifier (RFPA) when a high PAPR instantaneous high peak is detected in the RF signal prior to receipt by the RFPA. Additionally, a first element operable detects when an instantaneous output voltage of the Radio Frequency (RF) power amplifier (RFPA) is below a predetermined voltage, and in response, a second element supplies additional current to prevent the output voltage of the RFPA from falling below a predetermined threshold voltage.
SCREENING METHOD FOR PIN DIODES USED IN MICROWAVE LIMITERS
A method of testing a PIN diode for a power limiter circuit comprises measuring a reverse bias current of the PIN diode; applying a reverse bias voltage to the PIN diode; increasing the reverse bias voltage until the reverse bias current of the PIN diode reaches a threshold current indicative of a reverse voltage breakdown; and determining whether the reverse bias breakdown voltage of the PIN diode is within an acceptable range of reverse bias breakdown voltages corresponding to a power range at which the power limiter circuit would enter power limiting mode with the PIN diode.
SCREENING METHOD FOR PIN DIODES USED IN MICROWAVE LIMITERS
A method of testing a PIN diode for a power limiter circuit comprises measuring a reverse bias current of the PIN diode; applying a reverse bias voltage to the PIN diode; increasing the reverse bias voltage until the reverse bias current of the PIN diode reaches a threshold current indicative of a reverse voltage breakdown; and determining whether the reverse bias breakdown voltage of the PIN diode is within an acceptable range of reverse bias breakdown voltages corresponding to a power range at which the power limiter circuit would enter power limiting mode with the PIN diode.
Method and apparatus to optimize power clamping
A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
RF power amplifier performance by clipping prevention of large PAPR signals
Preventing RF signal distortion and signal error producing memory events in a Radio Frequency (RF) power amplifier (RFPA). An element, disposed prior to the Radio Frequency (RF) power amplifier (RFPA) in a signal path of a RF signal input to the RFPA, may enforce a maximum allowable amplitude in a high PAPR instantaneous high peak of the RF signal. An element may also increase or supplement a bias of the Radio Frequency (RF) power amplifier (RFPA) when a high PAPR instantaneous high peak is detected in the RF signal prior to receipt by the RFPA. Additionally, a first element operable detects when an instantaneous output voltage of the Radio Frequency (RF) power amplifier (RFPA) is below a predetermined voltage, and in response, a second element supplies additional current to prevent the output voltage of the RFPA from falling below a predetermined threshold voltage.