Preventing RF signal distortion and signal error producing memory events in a Radio Frequency (RF) power amplifier (RFPA). An element, disposed prior to the Radio Frequency (RF) power amplifier (RFPA) in a signal path of a RF signal input to the RFPA, may enforce a maximum allowable amplitude in a high PAPR instantaneous high peak of the RF signal. An element may also increase or supplement a bias of the Radio Frequency (RF) power amplifier (RFPA) when a high PAPR instantaneous high peak is detected in the RF signal prior to receipt by the RFPA. Additionally, a first element operable detects when an instantaneous output voltage of the Radio Frequency (RF) power amplifier (RFPA) is below a predetermined voltage, and in response, a second element supplies additional current to prevent the output voltage of the RFPA from falling below a predetermined threshold voltage.

An overvoltage protection and gain bootstrap circuit of a power amplifier includes a power amplification transistor, and a diode reversely connected with a gate of the power amplification transistor. A negative electrode of the diode is connected with the gate of the power transistor, and a positive electrode of the diode is connected with a constant voltage source, such that a function of overvoltage protection and gain bootstrap of the circuit is realized by controlling a turn-on state of the diode. By adding a diode device to the circuit, gate-drain overvoltage protection for the power amplification transistor can be provided, and the gain of the amplifier can be improved before power compression, thereby improving linearity of the power amplifier. The structure of the circuit can be simple, with reduced occupied area hardware cost.

A number of monolithic diode limiter semiconductor structures are described. The diode limiters can include a hybrid arrangement of diodes with different intrinsic regions, all formed over the same semiconductor substrate. In one example, two PIN diodes in a diode limiter semiconductor structure have different intrinsic region thicknesses. The first PIN diode has a thinner intrinsic region, and the second PIN diode has a thicker intrinsic region. This configuration allows for both the thin intrinsic region PIN diode and the thick intrinsic region PIN diode to be individually optimized. The thin intrinsic region PIN diode can be optimized for low level turn on and flat leakage, and the thick intrinsic region PIN diode can be optimized for low capacitance, good isolation, and high incident power levels. This configuration is not limited to two stage solutions, as additional stages can be used for higher incident power handling.

An active limiting system that is suitable to protect a low noise amplifier against the high power signals received from a signal input includes, at least one first switch, source of which is connected to a gate voltage; at least first resistor which is connected between the gate and source of the first switch; at least one second resistor, which is connected between a drain voltage and drain of the first switch; at least one second switch, source of which is connected to said drain voltage and drain of which is connected to a signal input; at least one third resistor which is connected between the drain of the first switch and gate of the second switch; at least one first filtering element, which blocks DC currents/voltages and which is connected between the source of the second switch and ground.

An active limiting system that is suitable to protect a low noise amplifier against the high power signals received from a signal input includes, at least one first switch, source of which is connected to a gate voltage; at least first resistor which is connected between the gate and source of the first switch; at least one second resistor, which is connected between a drain voltage and drain of the first switch; at least one second switch, source of which is connected to said drain voltage and drain of which is connected to a signal input; at least one third resistor which is connected between the drain of the first switch and gate of the second switch; at least one first filtering element, which blocks DC currents/voltages and which is connected between the source of the second switch and ground.

Programmable clamping methods and devices providing adjustable clamping powers to accommodate different applications and requirements are disclosed. The described devices can use switchable clamping circuits having different structures, body-controlled clamping circuits, or clamping circuits adjusting their input power levels using programmable resistive ladders. Examples of how the disclosed devices can be combined to improve design flexibility are also provided.

Programmable clamping methods and devices providing adjustable clamping powers to accommodate different applications and requirements are disclosed. The described devices can use switchable clamping circuits having different structures, body-controlled clamping circuits, or clamping circuits adjusting their input power levels using programmable resistive ladders. Examples of how the disclosed devices can be combined to improve design flexibility are also provided.

A switch element is arranged between an input terminal and an output terminal. A signal from the input terminal is distributed by a capacitative element and supplied to the cathode side of a diode. An inductor is connected to the cathode side of the diode, and a smoothing circuit including a capacitative element and a resistor is connected to the anode side. The switch element has a control terminal connected to the anode of the diode, and turns off a path between the input terminal and the output terminal when a voltage is applied to the control terminal.

A first inductor is connected to an input terminal through a capacitive element. To the first inductor, an anti-parallel diode pair including a first diode and a second diode, and a second inductor are connected. The first inductor and the anti-parallel diode pair are coupled to each other by an electromagnetic field, thereby forming a coupling capacitance.

A first inductor is connected to an input terminal through a capacitive element. To the first inductor, an anti-parallel diode pair including a first diode and a second diode, and a second inductor are connected. The first inductor and the anti-parallel diode pair are coupled to each other by an electromagnetic field, thereby forming a coupling capacitance.